module aru_instr_mngr (
    input logic                    clk,
    input logic                    rst_n,
          is_instr_if.in           u_is_aru_instr_if,
          aru_ub_rdgen_cfg_if.out  u_aru_ub_rdgen_cfg_if,
          aru_psb_rdgen_cfg_if.out u_aru_psb_rdgen_cfg_if,
          aru_arb_rdgen_cfg_if.out u_aru_arb_rdgen_cfg_if,
          aru_mux_cfg_if.out       u_aru_mux_2_to_1_up_cfg_if,
          aru_mux_cfg_if.out       u_aru_mux_1_to_4_up_cfg_if,
          aru_mux_cfg_if.out       u_aru_mux_1_to_2_psb_cfg_if,
          aru_mux_cfg_if.out       u_aru_mux_2_to_1_down_cfg_if,
          aru_mux_cfg_if.out       u_aru_mux_1_to_4_down_cfg_if,
          aru_mux_cfg_if.out       u_aru_mux_1_to_3_unary_cfg_if,
          aru_add_sub_cfg_if.out   u_aru_add_sub_cfg_if,
          aru_max_min_cfg_if.out   u_aru_max_min_cfg_if,
          aru_mul_cfg_if.out       u_aru_mul_cfg_if,
          aru_div_cfg_if.out       u_aru_div_cfg_if,
          aru_unary_cfg_if.out     u_aru_neg_cfg_if,
          aru_unary_cfg_if.out     u_aru_clamp_cfg_if,
          aru_unary_cfg_if.out     u_aru_exp_cfg_if,
          aru_unary_cfg_if.out     u_aru_sqrt_cfg_if,
          aru_unary_cfg_if.out     u_aru_pow_cfg_if,
          aru_unary_cfg_if.out     u_aru_recp_cfg_if,
          aru_reduce_cfg_if.out    u_aru_reduce_cfg_if,
          aru_ub_wrgen_cfg_if.out  u_aru_ub_wrgen_cfg_if,
          aru_gm_wrgen_cfg_if.out  u_aru_gm_wrgen_cfg_if,
          aru_arb_wrgen_cfg_if.out u_aru_arb_wrgen_cfg_if,
          done_if.in               u_arb_wr_done_if,
          done_if.in               u_ub_wr_done_if,
          done_if.in               u_gm_wr_done_if,
          done_if.out              u_done_if
);

    logic [$clog2(`ARU_INSTR_PIPE_DEPTH)-1:0] instr_idx_to_recv;
    always_ff @(posedge clk or negedge rst_n) begin
        if (!rst_n) begin
            instr_idx_to_recv <= 16'd0;
        end else begin
            if (u_is_aru_instr_if.vld && u_is_aru_instr_if.rdy) begin
                instr_idx_to_recv <= instr_idx_to_recv + 'd1;
            end
        end
    end

    isa_t                                     instr_slt      [`ARU_INSTR_PIPE_DEPTH];
    logic                                     instr_vld      [`ARU_INSTR_PIPE_DEPTH];
    logic [                  `ARU_OP_NUM-1:0] cfg_sent       [`ARU_INSTR_PIPE_DEPTH];
    logic                                     cfg_en         [          `ARU_OP_NUM];
    logic [$clog2(`ARU_INSTR_PIPE_DEPTH)-1:0] cfg_idx_to_send[          `ARU_OP_NUM];
    always_ff @(posedge clk or negedge rst_n) begin
        if (!rst_n) begin
            for (integer i = 0; i < `ARU_INSTR_PIPE_DEPTH; i = i + 1) begin
                instr_slt[i] <= 'd0;
                instr_vld[i] <= 1'b0;
            end
        end else begin
            for (integer i = 0; i < `ARU_INSTR_PIPE_DEPTH; i = i + 1) begin
                if (instr_vld[i] == 1'b0) begin
                    if (u_is_aru_instr_if.vld && u_is_aru_instr_if.rdy && (i == instr_idx_to_recv)) begin
                        instr_slt[i] <= u_is_aru_instr_if.pld;
                        instr_vld[i] <= 1'b1;
                    end
                end else begin
                    if (cfg_sent[i] == {`ARU_OP_NUM{1'b1}}) begin
                        instr_slt[i] <= 'd0;
                        instr_vld[i] <= 1'b0;
                    end
                end
            end
        end
    end


    always_comb begin
        // 默认所有模块不使能
        for (integer i = 0; i < `ARU_OP_NUM; i = i + 1) begin
            cfg_en[i] = 1'b0;
        end
        // 根据指令选择使能模块
        if (instr_vld[instr_idx_to_recv]) begin
            case (u_is_aru_instr_if.pld.bin[7:0])  // opcode
                8'd48: begin  // aru_psb2ub
                    // 读模块使能
                    cfg_en[`PSB_RDGEN_ID] = 1'b1;
                    cfg_en[`ARB_RDGEN_ID] = u_is_aru_instr_if.pld.aru_psb2ub.arb_en;
                    cfg_en[`UB_WRGEN_ID] = u_is_aru_instr_if.pld.aru_psb2ub.ub_wr_en;
                    cfg_en[`ARB_WRGEN_ID] = u_is_aru_instr_if.pld.aru_psb2ub.arb_wr_en;

                    // Binary运算模块使能
                    cfg_en[`ADD_SUB_ID] = u_is_aru_instr_if.pld.aru_psb2ub.add_en | u_is_aru_instr_if.pld.aru_psb2ub.sub_en;
                    cfg_en[`MAX_MIN_ID] = 1'b1;
                    cfg_en[`MUL_ID] = u_is_aru_instr_if.pld.aru_psb2ub.mul_en | cfg_en[`ADD_SUB_ID];
                    cfg_en[`DIV_ID] = u_is_aru_instr_if.pld.aru_psb2ub.div_en | cfg_en[`MUL_ID];
                    // Unary运算模块全部使能
                    cfg_en[`NEG_ID] = 1'b1;
                    cfg_en[`CLAMP_ID] = 1'b1;
                    cfg_en[`EXP_ID] = 1'b1;
                    cfg_en[`SQRT_ID] = 1'b1;
                    cfg_en[`POW_ID] = 1'b1;
                    cfg_en[`RECP_ID] = 1'b1;
                    // Reduce运算模块使能
                    cfg_en[`REDUCE_ID] = u_is_aru_instr_if.pld.aru_psb2ub.reduce_m_en | 
                                u_is_aru_instr_if.pld.aru_psb2ub.reduce_n_en;
                    // MUX模块使能
                    cfg_en[`MUX_2_TO_1_UP_ID] = 1'b1;  // 选择PSB输入
                    cfg_en[`MUX_1_TO_4_UP_ID] = 1'b1;
                    cfg_en[`MUX_1_TO_2_PSB_ID] = 1'b1;
                    cfg_en[`MUX_2_TO_1_DOWN_ID] = cfg_en[`ARB_RDGEN_ID];
                    cfg_en[`MUX_1_TO_4_DOWN_ID] = cfg_en[`ARB_RDGEN_ID];
                    cfg_en[`MUX_1_TO_3_UNARY_ID] = 1'b1;
                end

                8'd49: begin  // aru_psb2gm
                    // 读模块使能
                    cfg_en[`PSB_RDGEN_ID] = 1'b1;
                    cfg_en[`ARB_RDGEN_ID] = u_is_aru_instr_if.pld.aru_psb2gm.arb_en;
                    cfg_en[`GM_WRGEN_ID] = 1'b1;

                    // Binary运算模块使能
                    cfg_en[`ADD_SUB_ID] = u_is_aru_instr_if.pld.aru_psb2gm.add_en | u_is_aru_instr_if.pld.aru_psb2gm.sub_en;
                    cfg_en[`MAX_MIN_ID] = 1'b1;
                    cfg_en[`MUL_ID] = u_is_aru_instr_if.pld.aru_psb2gm.mul_en | cfg_en[`ADD_SUB_ID];
                    cfg_en[`DIV_ID] = u_is_aru_instr_if.pld.aru_psb2gm.div_en | cfg_en[`MUL_ID];

                    // Unary运算模块使能
                    cfg_en[`NEG_ID] = 1'b1;
                    cfg_en[`CLAMP_ID] = 1'b1;
                    cfg_en[`EXP_ID] = 1'b1;
                    cfg_en[`SQRT_ID] = 1'b1;
                    cfg_en[`POW_ID] = 1'b1;
                    cfg_en[`RECP_ID] = 1'b1;

                    // MUX使能配置相同
                    cfg_en[`MUX_2_TO_1_UP_ID] = 1'b1;  // 选择PSB输入
                    cfg_en[`MUX_1_TO_4_UP_ID] = 1'b1;
                    cfg_en[`MUX_1_TO_2_PSB_ID] = 1'b1;
                    cfg_en[`MUX_2_TO_1_DOWN_ID] = cfg_en[`ARB_RDGEN_ID];
                    cfg_en[`MUX_1_TO_4_DOWN_ID] = cfg_en[`ARB_RDGEN_ID];
                    cfg_en[`MUX_1_TO_3_UNARY_ID] = 1'b1;
                end

                8'd50: begin  // aru_ub2ub
                    // 读模块使能
                    cfg_en[`UB_RDGEN_ID] = 1'b1;
                    cfg_en[`ARB_RDGEN_ID] = u_is_aru_instr_if.pld.aru_ub2ub.arb_en;
                    cfg_en[`UB_WRGEN_ID] = u_is_aru_instr_if.pld.aru_ub2ub.ub_wr_en;
                    cfg_en[`ARB_WRGEN_ID] = u_is_aru_instr_if.pld.aru_ub2ub.arb_wr_en;

                    // Binary运算模块使能
                    cfg_en[`ADD_SUB_ID] = u_is_aru_instr_if.pld.aru_ub2ub.add_en | u_is_aru_instr_if.pld.aru_ub2ub.sub_en;
                    cfg_en[`MAX_MIN_ID] = 1'b1;
                    cfg_en[`MUL_ID] = u_is_aru_instr_if.pld.aru_ub2ub.mul_en | cfg_en[`ADD_SUB_ID];
                    cfg_en[`DIV_ID] = u_is_aru_instr_if.pld.aru_ub2ub.div_en | cfg_en[`MUL_ID];

                    // Unary运算模块使能
                    cfg_en[`NEG_ID] = 1'b1;
                    cfg_en[`CLAMP_ID] = 1'b1;
                    cfg_en[`EXP_ID] = 1'b1;
                    cfg_en[`SQRT_ID] = 1'b1;
                    cfg_en[`POW_ID] = 1'b1;
                    cfg_en[`RECP_ID] = 1'b1;
                    cfg_en[`REDUCE_ID] = u_is_aru_instr_if.pld.aru_ub2ub.reduce_m_en | 
                                u_is_aru_instr_if.pld.aru_ub2ub.reduce_n_en;
                    // MUX配置
                    cfg_en[`MUX_2_TO_1_UP_ID] = 1'b1;  // 选择PSB输入
                    cfg_en[`MUX_1_TO_4_UP_ID] = 1'b1;
                    cfg_en[`MUX_1_TO_2_PSB_ID] = 1'b0;
                    cfg_en[`MUX_2_TO_1_DOWN_ID] = cfg_en[`ARB_RDGEN_ID];
                    cfg_en[`MUX_1_TO_4_DOWN_ID] = cfg_en[`ARB_RDGEN_ID];
                    cfg_en[`MUX_1_TO_3_UNARY_ID] = 1'b1;
                end

                8'd51: begin  // aru_dual2ub
                    // 读模块使能
                    cfg_en[`UB_RDGEN_ID] = 1'b1;
                    cfg_en[`PSB_RDGEN_ID] = 1'b1;
                    cfg_en[`UB_WRGEN_ID] = u_is_aru_instr_if.pld.aru_dual2ub.ub_wr_en;
                    cfg_en[`ARB_WRGEN_ID] = u_is_aru_instr_if.pld.aru_dual2ub.arb_wr_en;

                    // Binary运算模块使能
                    cfg_en[`ADD_SUB_ID] = u_is_aru_instr_if.pld.aru_dual2ub.add_en | u_is_aru_instr_if.pld.aru_dual2ub.sub_en;
                    cfg_en[`MAX_MIN_ID] = 1'b1;
                    cfg_en[`MUL_ID] = u_is_aru_instr_if.pld.aru_dual2ub.mul_en | cfg_en[`ADD_SUB_ID];
                    cfg_en[`DIV_ID] = u_is_aru_instr_if.pld.aru_dual2ub.div_en | cfg_en[`MUL_ID];

                    // Unary运算模块使能
                    cfg_en[`NEG_ID] = 1'b1;
                    cfg_en[`CLAMP_ID] = 1'b1;
                    cfg_en[`EXP_ID] = 1'b1;
                    cfg_en[`SQRT_ID] = 1'b1;
                    cfg_en[`POW_ID] = 1'b1;
                    cfg_en[`RECP_ID] = 1'b1;
                    cfg_en[`REDUCE_ID] = u_is_aru_instr_if.pld.aru_dual2ub.reduce_m_en | 
                                u_is_aru_instr_if.pld.aru_dual2ub.reduce_n_en;
                    // MUX配置
                    cfg_en[`MUX_2_TO_1_UP_ID] = 1'b1;  // 选择PSB输入
                    cfg_en[`MUX_1_TO_4_UP_ID] = 1'b1;
                    cfg_en[`MUX_1_TO_2_PSB_ID] = 1'b1;
                    cfg_en[`MUX_2_TO_1_DOWN_ID] = 1'b1;
                    cfg_en[`MUX_1_TO_4_DOWN_ID] = 1'b1;
                    cfg_en[`MUX_1_TO_3_UNARY_ID] = 1'b1;
                end

                8'd52: begin  // aru_ub2gm
                    // 读模块使能
                    cfg_en[`UB_RDGEN_ID] = 1'b1;
                    cfg_en[`ARB_RDGEN_ID] = u_is_aru_instr_if.pld.aru_ub2gm.arb_en;
                    cfg_en[`GM_WRGEN_ID] = 1'b1;

                    // Binary运算模块使能
                    cfg_en[`ADD_SUB_ID] = u_is_aru_instr_if.pld.aru_ub2gm.add_en | u_is_aru_instr_if.pld.aru_ub2gm.sub_en;
                    cfg_en[`MAX_MIN_ID] = 1'b1;
                    cfg_en[`MUL_ID] = u_is_aru_instr_if.pld.aru_ub2gm.mul_en | cfg_en[`ADD_SUB_ID];
                    cfg_en[`DIV_ID] = u_is_aru_instr_if.pld.aru_ub2gm.div_en | cfg_en[`MUL_ID];

                    // Unary运算模块使能
                    cfg_en[`NEG_ID] = 1'b1;
                    cfg_en[`CLAMP_ID] = 1'b1;
                    cfg_en[`EXP_ID] = 1'b1;
                    cfg_en[`SQRT_ID] = 1'b1;
                    cfg_en[`POW_ID] = 1'b1;
                    cfg_en[`RECP_ID] = 1'b1;
                    // MUX配置
                    cfg_en[`MUX_2_TO_1_UP_ID] = 1'b1;  // 选择PSB输入
                    cfg_en[`MUX_1_TO_4_UP_ID] = 1'b1;
                    cfg_en[`MUX_1_TO_2_PSB_ID] = 1'b0;
                    cfg_en[`MUX_2_TO_1_DOWN_ID] = cfg_en[`ARB_RDGEN_ID];
                    cfg_en[`MUX_1_TO_4_DOWN_ID] = cfg_en[`ARB_RDGEN_ID];
                    cfg_en[`MUX_1_TO_3_UNARY_ID] = 1'b1;
                end

                8'd53: begin  // aru_arb2arb
                    // 读模块使能
                    cfg_en[`ARB_RDGEN_ID] = 1'b1;
                    cfg_en[`ARB_WRGEN_ID] = 1'b1;

                    // Binary运算模块使能
                    cfg_en[`ADD_SUB_ID] = u_is_aru_instr_if.pld.aru_arb2arb.add_en | u_is_aru_instr_if.pld.aru_arb2arb.sub_en;
                    cfg_en[`MAX_MIN_ID] = 1'b1;
                    cfg_en[`MUL_ID] = u_is_aru_instr_if.pld.aru_arb2arb.mul_en | cfg_en[`ADD_SUB_ID];
                    cfg_en[`DIV_ID] = u_is_aru_instr_if.pld.aru_arb2arb.div_en | cfg_en[`MUL_ID];

                    // Unary运算模块使能
                    cfg_en[`NEG_ID] = 1'b1;
                    cfg_en[`CLAMP_ID] = 1'b1;
                    cfg_en[`EXP_ID] = 1'b1;
                    cfg_en[`SQRT_ID] = 1'b1;
                    cfg_en[`POW_ID] = 1'b1;
                    cfg_en[`RECP_ID] = 1'b1;
                    // MUX配置
                    cfg_en[`MUX_2_TO_1_UP_ID] = 1'b0;  // 选择PSB输入
                    cfg_en[`MUX_1_TO_4_UP_ID] = 1'b0;
                    cfg_en[`MUX_1_TO_2_PSB_ID] = 1'b0;
                    cfg_en[`MUX_2_TO_1_DOWN_ID] = 1'b1;
                    cfg_en[`MUX_1_TO_4_DOWN_ID] = 1'b1;
                    cfg_en[`MUX_1_TO_3_UNARY_ID] = 1'b1;
                end

                default: begin
                    // 所有使能信号置0
                    for (integer i = 0; i < `ARU_OP_NUM; i = i + 1) begin
                        cfg_en[i] = 1'b0;
                    end
                end
            endcase
        end

    end

    // cfg_rdy signals
    logic cfg_rdy[`ARU_OP_NUM];
    assign cfg_rdy[`UB_RDGEN_ID]         = u_aru_ub_rdgen_cfg_if.rdy;
    assign cfg_rdy[`PSB_RDGEN_ID]        = u_aru_psb_rdgen_cfg_if.rdy;
    assign cfg_rdy[`ARB_RDGEN_ID]        = u_aru_arb_rdgen_cfg_if.rdy;
    assign cfg_rdy[`MUX_2_TO_1_UP_ID]    = u_aru_mux_2_to_1_up_cfg_if.rdy;
    assign cfg_rdy[`MUX_1_TO_4_UP_ID]    = u_aru_mux_1_to_4_up_cfg_if.rdy;
    assign cfg_rdy[`MUX_1_TO_2_PSB_ID]   = u_aru_mux_1_to_2_psb_cfg_if.rdy;
    assign cfg_rdy[`MUX_2_TO_1_DOWN_ID]  = u_aru_mux_2_to_1_down_cfg_if.rdy;
    assign cfg_rdy[`MUX_1_TO_4_DOWN_ID]  = u_aru_mux_1_to_4_down_cfg_if.rdy;
    assign cfg_rdy[`MUX_1_TO_3_UNARY_ID] = u_aru_mux_1_to_3_unary_cfg_if.rdy;
    assign cfg_rdy[`ADD_SUB_ID]          = u_aru_add_sub_cfg_if.rdy;
    assign cfg_rdy[`MAX_MIN_ID]          = u_aru_max_min_cfg_if.rdy;
    assign cfg_rdy[`MUL_ID]              = u_aru_mul_cfg_if.rdy;
    assign cfg_rdy[`DIV_ID]              = u_aru_div_cfg_if.rdy;
    assign cfg_rdy[`CLAMP_ID]            = u_aru_clamp_cfg_if.rdy;
    assign cfg_rdy[`EXP_ID]              = u_aru_exp_cfg_if.rdy;
    assign cfg_rdy[`SQRT_ID]             = u_aru_sqrt_cfg_if.rdy;
    assign cfg_rdy[`POW_ID]              = u_aru_pow_cfg_if.rdy;
    assign cfg_rdy[`RECP_ID]             = u_aru_recp_cfg_if.rdy;
    assign cfg_rdy[`REDUCE_ID]           = u_aru_reduce_cfg_if.rdy;
    assign cfg_rdy[`UB_WRGEN_ID]         = u_aru_ub_wrgen_cfg_if.rdy;
    assign cfg_rdy[`GM_WRGEN_ID]         = u_aru_gm_wrgen_cfg_if.rdy;
    assign cfg_rdy[`ARB_WRGEN_ID]        = u_aru_arb_wrgen_cfg_if.rdy;



    always_ff @(posedge clk or negedge rst_n) begin
        if (!rst_n) begin
            for (integer i = 0; i < `ARU_OP_NUM; i = i + 1) begin
                cfg_idx_to_send[i] <= 'd0;
            end
            for (integer i = 0; i < `ARU_INSTR_PIPE_DEPTH; i = i + 1) begin
                cfg_sent[i] <= 'd0;  // 使用 '0 而不是 'b0
            end
        end else begin
            for (integer i = 0; i < `ARU_OP_NUM; i = i + 1) begin
                for (integer j = 0; j < `ARU_INSTR_PIPE_DEPTH; j = j + 1) begin
                    if (cfg_sent[j][i] == 1'b0) begin
                        if (cfg_en[i] == 1'b1) begin
                            if ((cfg_idx_to_send[i] == j) && instr_vld[j] && cfg_rdy[i]) begin
                                cfg_idx_to_send[i] <= cfg_idx_to_send[i] + 1'b1;
                                cfg_sent[j][i]     <= 1'b1;
                            end
                        end else begin
                            cfg_idx_to_send[i] <= cfg_idx_to_send[i] + 1'b1;
                            cfg_sent[j][i]     <= 1'b1;
                        end
                    end else begin
                        if (cfg_sent[j] == {`ARU_OP_NUM{1'b1}}) begin
                            cfg_sent[j] <= 'd0;
                        end
                    end
                end
            end

        end
    end


    logic [$clog2(`ARU_INSTR_PIPE_DEPTH):0] instr_idx_to_msk;
    logic [$clog2(`ARU_INSTR_PIPE_DEPTH):0] instr_idx_to_rsp;
    logic [$clog2(`ARU_INSTR_PIPE_DEPTH):0] cfg_idx_to_recv[3];  // 0: ARB WRGEN, 1: UB WRGEN, 2: GM WRGEN
    logic [2:0] cfg_msk[`ARU_INSTR_PIPE_DEPTH*2];
    logic [2:0] cfg_rsp[`ARU_INSTR_PIPE_DEPTH*2];

    always_ff @(posedge clk or negedge rst_n) begin
        if (!rst_n) begin
            instr_idx_to_msk <= 'd0;
        end else begin
            if (u_is_aru_instr_if.vld && u_is_aru_instr_if.rdy) begin
                instr_idx_to_msk <= instr_idx_to_msk + 'd1;
            end
        end
    end

    logic instr_done;
    assign instr_done = (cfg_msk[instr_idx_to_rsp] == cfg_rsp[instr_idx_to_rsp]);
    always_ff @(posedge clk or negedge rst_n) begin
        if (!rst_n) begin
            instr_idx_to_rsp <= 'd0;
        end else begin
            if (instr_done) begin
                instr_idx_to_rsp <= instr_idx_to_rsp + 'd1;
            end
        end
    end

    always_ff @(posedge clk or negedge rst_n) begin
        if (!rst_n) begin
            for (integer i = 0; i < `ARU_INSTR_PIPE_DEPTH * 2; i = i + 1) begin
                cfg_msk[i] <= 3'b000;
            end
        end else begin
            for (integer i = 0; i < `ARU_INSTR_PIPE_DEPTH * 2; i++) begin
                if (cfg_msk[i] == 'd0) begin
                    if (u_is_aru_instr_if.vld && u_is_aru_instr_if.rdy && (i == instr_idx_to_msk)) begin
                        cfg_msk[i] <= {cfg_en[`GM_WRGEN_ID], cfg_en[`UB_WRGEN_ID], cfg_en[`ARB_WRGEN_ID]};
                    end
                end else begin
                    if (instr_done) begin
                        cfg_msk[i] <= 'd0;
                    end
                end
            end
        end
    end

    always_ff @(posedge clk or negedge rst_n) begin
        if (!rst_n) begin
            for (integer i = 0; i < `ARU_INSTR_PIPE_DEPTH * 2; i = i + 1) begin
                cfg_rsp[i] <= 3'b000;
            end
            for (integer j = 0; j < 3; j = j + 1) begin
                cfg_idx_to_recv[j] <= 'd0;
            end
        end else begin
            for (integer i = 0; i < `ARU_INSTR_PIPE_DEPTH * 2; i++) begin
                if (cfg_rsp[i][0] == 'd0) begin
                    if (u_arb_wr_done_if.vld) begin
                        cfg_rsp[i]         <= 'd0;
                        cfg_idx_to_recv[0] <= cfg_idx_to_recv[0] + 'd1;
                    end
                end else begin
                    if ((cfg_rsp[i] == cfg_msk[i]) && (i == instr_idx_to_rsp)) begin
                        cfg_rsp[i][0] <= 'd0;
                    end
                end
                if (cfg_rsp[i][1] == 'd0) begin
                    if (u_ub_wr_done_if.vld) begin
                        cfg_rsp[i]         <= 'd0;
                        cfg_idx_to_recv[1] <= cfg_idx_to_recv[0] + 'd1;
                    end
                end else begin
                    if ((cfg_rsp[i] == cfg_msk[i]) && (i == instr_idx_to_rsp)) begin
                        cfg_rsp[i][1] <= 'd0;
                    end
                end
                if (cfg_rsp[i][2] == 'd0) begin
                    if (u_gm_wr_done_if.vld) begin
                        cfg_rsp[i]         <= 'd0;
                        cfg_idx_to_recv[2] <= cfg_idx_to_recv[2] + 'd1;
                    end
                end else begin
                    if ((cfg_rsp[i] == cfg_msk[i]) && (i == instr_idx_to_rsp)) begin
                        cfg_rsp[i][0] <= 'd0;
                    end
                end
            end
        end
    end

    assign u_is_aru_instr_if.rdy = (~instr_vld[instr_idx_to_recv]) && (cfg_msk[instr_idx_to_msk] == 'd0);

    // 配置子模块端口
    always_comb begin
        if (cfg_en[`UB_RDGEN_ID]) begin
            case (instr_slt[cfg_idx_to_send[`UB_RDGEN_ID]].bin[7:0])  // opcode
                8'd50: begin  // aru_ub2ub
                    u_aru_ub_rdgen_cfg_if.vld       = instr_vld[cfg_idx_to_send[`UB_RDGEN_ID]];
                    u_aru_ub_rdgen_cfg_if.ub_addr   = instr_slt[cfg_idx_to_send[`UB_RDGEN_ID]].aru_ub2ub.ub_addr;
                    u_aru_ub_rdgen_cfg_if.slice_m   = instr_slt[cfg_idx_to_send[`UB_RDGEN_ID]].aru_ub2ub.slice_m;
                    u_aru_ub_rdgen_cfg_if.slice_n   = instr_slt[cfg_idx_to_send[`UB_RDGEN_ID]].aru_ub2ub.slice_n;
                    u_aru_ub_rdgen_cfg_if.reduce_m  = instr_slt[cfg_idx_to_send[`UB_RDGEN_ID]].aru_ub2ub.reduce_m_en;
                    u_aru_ub_rdgen_cfg_if.instr_idx = instr_slt[cfg_idx_to_send[`UB_RDGEN_ID]].aru_ub2ub.instr_idx;
                end
                8'd51: begin  // aru_dual2ub
                    u_aru_ub_rdgen_cfg_if.vld       = cfg_en[`UB_RDGEN_ID];
                    u_aru_ub_rdgen_cfg_if.ub_addr   = instr_slt[cfg_idx_to_send[`UB_RDGEN_ID]].aru_dual2ub.ub_addr;
                    u_aru_ub_rdgen_cfg_if.slice_m   = instr_slt[cfg_idx_to_send[`UB_RDGEN_ID]].aru_dual2ub.slice_m;
                    u_aru_ub_rdgen_cfg_if.slice_n   = instr_slt[cfg_idx_to_send[`UB_RDGEN_ID]].aru_dual2ub.slice_n;
                    u_aru_ub_rdgen_cfg_if.reduce_m  = instr_slt[cfg_idx_to_send[`UB_RDGEN_ID]].aru_dual2ub.reduce_m_en;
                    u_aru_ub_rdgen_cfg_if.instr_idx = instr_slt[cfg_idx_to_send[`UB_RDGEN_ID]].aru_dual2ub.instr_idx;
                end
                8'd52: begin  // aru_ub2gm
                    u_aru_ub_rdgen_cfg_if.vld       = cfg_en[`UB_RDGEN_ID];
                    u_aru_ub_rdgen_cfg_if.ub_addr   = instr_slt[cfg_idx_to_send[`UB_RDGEN_ID]].aru_ub2gm.ub_addr;
                    u_aru_ub_rdgen_cfg_if.slice_m   = instr_slt[cfg_idx_to_send[`UB_RDGEN_ID]].aru_ub2gm.tile_m;
                    u_aru_ub_rdgen_cfg_if.slice_n   = instr_slt[cfg_idx_to_send[`UB_RDGEN_ID]].aru_ub2gm.tile_n;
                    u_aru_ub_rdgen_cfg_if.reduce_m  = 1'b0;  // ub2gm不需要reduce
                    u_aru_ub_rdgen_cfg_if.instr_idx = instr_slt[cfg_idx_to_send[`UB_RDGEN_ID]].aru_ub2gm.instr_idx;
                end
                default: begin
                    u_aru_ub_rdgen_cfg_if.vld       = 1'b0;
                    u_aru_ub_rdgen_cfg_if.ub_addr   = 'd0;
                    u_aru_ub_rdgen_cfg_if.slice_m   = 'd0;
                    u_aru_ub_rdgen_cfg_if.slice_n   = 'd0;
                    u_aru_ub_rdgen_cfg_if.reduce_m  = 1'b0;
                    u_aru_ub_rdgen_cfg_if.instr_idx = 'd0;
                end
            endcase
        end

        if (cfg_en[`PSB_RDGEN_ID]) begin
            case (instr_slt[cfg_idx_to_send[`PSB_RDGEN_ID]].bin[7:0])
                8'd48: begin  // aru_psb2ub
                    u_aru_psb_rdgen_cfg_if.vld       = instr_vld[cfg_idx_to_send[`PSB_RDGEN_ID]];
                    u_aru_psb_rdgen_cfg_if.psb_addr  = instr_slt[cfg_idx_to_send[`PSB_RDGEN_ID]].aru_psb2ub.psb_addr;
                    u_aru_psb_rdgen_cfg_if.slice_m   = instr_slt[cfg_idx_to_send[`PSB_RDGEN_ID]].aru_psb2ub.slice_m;
                    u_aru_psb_rdgen_cfg_if.slice_n   = instr_slt[cfg_idx_to_send[`PSB_RDGEN_ID]].aru_psb2ub.slice_n;
                    u_aru_psb_rdgen_cfg_if.reduce_m  = instr_slt[cfg_idx_to_send[`PSB_RDGEN_ID]].aru_psb2ub.reduce_m_en;
                    u_aru_psb_rdgen_cfg_if.instr_idx = instr_slt[cfg_idx_to_send[`PSB_RDGEN_ID]].aru_psb2ub.instr_idx;
                end
                8'd49: begin  // aru_psb2gm
                    u_aru_psb_rdgen_cfg_if.vld       = cfg_en[`PSB_RDGEN_ID];
                    u_aru_psb_rdgen_cfg_if.psb_addr  = instr_slt[cfg_idx_to_send[`PSB_RDGEN_ID]].aru_psb2gm.psb_addr;
                    u_aru_psb_rdgen_cfg_if.slice_m   = instr_slt[cfg_idx_to_send[`PSB_RDGEN_ID]].aru_psb2gm.slice_m;
                    u_aru_psb_rdgen_cfg_if.slice_n   = instr_slt[cfg_idx_to_send[`PSB_RDGEN_ID]].aru_psb2gm.slice_n;
                    u_aru_psb_rdgen_cfg_if.reduce_m  = 1'b0;  // psb2gm不需要reduce
                    u_aru_psb_rdgen_cfg_if.instr_idx = instr_slt[cfg_idx_to_send[`PSB_RDGEN_ID]].aru_psb2gm.instr_idx;
                end
                default: begin
                    u_aru_psb_rdgen_cfg_if.vld       = 1'b0;
                    u_aru_psb_rdgen_cfg_if.psb_addr  = 'd0;
                    u_aru_psb_rdgen_cfg_if.slice_m   = 'd0;
                    u_aru_psb_rdgen_cfg_if.slice_n   = 'd0;
                    u_aru_psb_rdgen_cfg_if.reduce_m  = 1'b0;
                    u_aru_psb_rdgen_cfg_if.instr_idx = 'd0;
                end
            endcase
        end

        if (cfg_en[`ARB_RDGEN_ID]) begin
            case (instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].bin[7:0])
                8'd48: begin  // aru_psb2ub
                    if (instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_psb2ub.arb_en) begin
                        u_aru_arb_rdgen_cfg_if.vld = instr_vld[cfg_idx_to_send[`ARB_RDGEN_ID]];
                        u_aru_arb_rdgen_cfg_if.arb_addr = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_psb2ub.arb_addr;
                        u_aru_arb_rdgen_cfg_if.slice_m = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_psb2ub.slice_m;
                        u_aru_arb_rdgen_cfg_if.slice_n = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_psb2ub.slice_n;
                        u_aru_arb_rdgen_cfg_if.broadcast_m = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_psb2ub.br_m;
                        u_aru_arb_rdgen_cfg_if.broadcast_n = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_psb2ub.br_n;
                        u_aru_arb_rdgen_cfg_if.instr_idx = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_psb2ub.instr_idx;
                    end else begin
                        u_aru_arb_rdgen_cfg_if.vld         = 1'b0;
                        u_aru_arb_rdgen_cfg_if.arb_addr    = 'd0;
                        u_aru_arb_rdgen_cfg_if.slice_m     = 'd0;
                        u_aru_arb_rdgen_cfg_if.slice_n     = 'd0;
                        u_aru_arb_rdgen_cfg_if.broadcast_m = 1'b0;
                        u_aru_arb_rdgen_cfg_if.broadcast_n = 1'b0;
                        u_aru_arb_rdgen_cfg_if.instr_idx   = 'd0;
                    end
                end
                8'd49: begin  // aru_psb2gm
                    if (instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_psb2gm.arb_en) begin
                        u_aru_arb_rdgen_cfg_if.vld = instr_vld[cfg_idx_to_send[`ARB_RDGEN_ID]];
                        u_aru_arb_rdgen_cfg_if.arb_addr = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_psb2gm.arb_addr;
                        u_aru_arb_rdgen_cfg_if.slice_m = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_psb2gm.slice_m;
                        u_aru_arb_rdgen_cfg_if.slice_n = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_psb2gm.slice_n;
                        u_aru_arb_rdgen_cfg_if.broadcast_m = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_psb2gm.br_m;
                        u_aru_arb_rdgen_cfg_if.broadcast_n = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_psb2gm.br_n;
                        u_aru_arb_rdgen_cfg_if.instr_idx = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_psb2gm.instr_idx;
                    end else begin
                        u_aru_arb_rdgen_cfg_if.vld         = 1'b0;
                        u_aru_arb_rdgen_cfg_if.arb_addr    = 'd0;
                        u_aru_arb_rdgen_cfg_if.slice_m     = 'd0;
                        u_aru_arb_rdgen_cfg_if.slice_n     = 'd0;
                        u_aru_arb_rdgen_cfg_if.broadcast_m = 1'b0;
                        u_aru_arb_rdgen_cfg_if.broadcast_n = 1'b0;
                        u_aru_arb_rdgen_cfg_if.instr_idx   = 'd0;
                    end
                end
                8'd50: begin  // aru_ub2ub
                    if (instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_ub2ub.arb_en) begin
                        u_aru_arb_rdgen_cfg_if.vld = instr_vld[cfg_idx_to_send[`ARB_RDGEN_ID]];
                        u_aru_arb_rdgen_cfg_if.arb_addr = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_ub2ub.arb_addr;
                        u_aru_arb_rdgen_cfg_if.slice_m = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_ub2ub.slice_m;
                        u_aru_arb_rdgen_cfg_if.slice_n = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_ub2ub.slice_n;
                        u_aru_arb_rdgen_cfg_if.broadcast_m = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_ub2ub.br_m;
                        u_aru_arb_rdgen_cfg_if.broadcast_n = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_ub2ub.br_n;
                        u_aru_arb_rdgen_cfg_if.instr_idx = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_ub2ub.instr_idx;
                    end else begin
                        u_aru_arb_rdgen_cfg_if.vld         = 1'b0;
                        u_aru_arb_rdgen_cfg_if.arb_addr    = 'd0;
                        u_aru_arb_rdgen_cfg_if.slice_m     = 'd0;
                        u_aru_arb_rdgen_cfg_if.slice_n     = 'd0;
                        u_aru_arb_rdgen_cfg_if.broadcast_m = 1'b0;
                        u_aru_arb_rdgen_cfg_if.broadcast_n = 1'b0;
                        u_aru_arb_rdgen_cfg_if.instr_idx   = 'd0;
                    end
                end
                8'd52: begin  // aru_ub2gm
                    if (instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_ub2gm.arb_en) begin
                        u_aru_arb_rdgen_cfg_if.vld = instr_vld[cfg_idx_to_send[`ARB_RDGEN_ID]];
                        u_aru_arb_rdgen_cfg_if.arb_addr = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_ub2gm.arb_addr;
                        u_aru_arb_rdgen_cfg_if.slice_m = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_ub2gm.tile_m;
                        u_aru_arb_rdgen_cfg_if.slice_n = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_ub2gm.tile_n;
                        u_aru_arb_rdgen_cfg_if.broadcast_m = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_ub2gm.br_m;
                        u_aru_arb_rdgen_cfg_if.broadcast_n = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_ub2gm.br_n;
                        u_aru_arb_rdgen_cfg_if.instr_idx = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_ub2gm.instr_idx;
                    end else begin
                        u_aru_arb_rdgen_cfg_if.vld         = 1'b0;
                        u_aru_arb_rdgen_cfg_if.arb_addr    = 'd0;
                        u_aru_arb_rdgen_cfg_if.slice_m     = 'd0;
                        u_aru_arb_rdgen_cfg_if.slice_n     = 'd0;
                        u_aru_arb_rdgen_cfg_if.broadcast_m = 1'b0;
                        u_aru_arb_rdgen_cfg_if.broadcast_n = 1'b0;
                        u_aru_arb_rdgen_cfg_if.instr_idx   = 'd0;
                    end
                end
                8'd53: begin  // aru_arb2arb
                    u_aru_arb_rdgen_cfg_if.vld = instr_vld[cfg_idx_to_send[`ARB_RDGEN_ID]];
                    u_aru_arb_rdgen_cfg_if.arb_addr = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_arb2arb.arb_addr;
                    u_aru_arb_rdgen_cfg_if.slice_m = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_arb2arb.slice_m;
                    u_aru_arb_rdgen_cfg_if.slice_n = 'd0;  // arb2arb只有M维度
                    u_aru_arb_rdgen_cfg_if.broadcast_m = 1'b0;  // arb2arb不需要broadcast
                    u_aru_arb_rdgen_cfg_if.broadcast_n = 1'b0;
                    u_aru_arb_rdgen_cfg_if.instr_idx = instr_slt[cfg_idx_to_send[`ARB_RDGEN_ID]].aru_arb2arb.instr_idx;
                end

                default: begin
                    u_aru_arb_rdgen_cfg_if.vld         = 1'b0;
                    u_aru_arb_rdgen_cfg_if.arb_addr    = 'd0;
                    u_aru_arb_rdgen_cfg_if.slice_m     = 'd0;
                    u_aru_arb_rdgen_cfg_if.slice_n     = 'd0;
                    u_aru_arb_rdgen_cfg_if.broadcast_m = 1'b0;
                    u_aru_arb_rdgen_cfg_if.broadcast_n = 1'b0;
                    u_aru_arb_rdgen_cfg_if.instr_idx   = 'd0;
                end
            endcase
        end

        if (cfg_en[`MUX_2_TO_1_UP_ID]) begin
            case (instr_slt[cfg_idx_to_send[`MUX_2_TO_1_UP_ID]].bin[7:0])
                8'd48, 8'd49: begin  // psb2ub, psb2gm
                    u_aru_mux_2_to_1_up_cfg_if.vld  = instr_vld[cfg_idx_to_send[`MUX_2_TO_1_UP_ID]];
                    u_aru_mux_2_to_1_up_cfg_if.mode = 2'd0;  // 选择PSB输入
                end
                8'd50, 8'd51, 8'd52: begin  // ub相关指令
                    u_aru_mux_2_to_1_up_cfg_if.vld  = instr_vld[cfg_idx_to_send[`MUX_2_TO_1_UP_ID]];
                    u_aru_mux_2_to_1_up_cfg_if.mode = 2'd1;  // 选择UB输入
                end
                default: begin
                    u_aru_mux_2_to_1_up_cfg_if.vld  = 1'b0;
                    u_aru_mux_2_to_1_up_cfg_if.mode = 2'd0;
                end
            endcase
        end

        if (cfg_en[`MUX_2_TO_1_DOWN_ID]) begin
            case (instr_slt[cfg_idx_to_send[`MUX_2_TO_1_UP_ID]].bin[7:0])
                8'd51: begin  // dual2ub
                    u_aru_mux_2_to_1_up_cfg_if.vld  = instr_vld[cfg_idx_to_send[`MUX_2_TO_1_DOWN_ID]];
                    u_aru_mux_2_to_1_up_cfg_if.mode = 2'd1;
                end
                8'd53, 8'd48, 8'd49, 8'd50, 8'd52: begin  // arb2arb
                    u_aru_mux_2_to_1_up_cfg_if.vld  = instr_vld[cfg_idx_to_send[`MUX_2_TO_1_DOWN_ID]];
                    u_aru_mux_2_to_1_up_cfg_if.mode = 2'd0;
                end

                default: begin
                    u_aru_mux_2_to_1_up_cfg_if.vld  = 1'b0;
                    u_aru_mux_2_to_1_up_cfg_if.mode = 2'd0;
                end
            endcase
        end

        if (cfg_en[`MUX_1_TO_2_PSB_ID]) begin
            case (instr_slt[cfg_idx_to_send[`MUX_1_TO_2_PSB_ID]].bin[7:0])
                8'd48: begin  // aru_psb2ub
                    u_aru_mux_1_to_2_psb_cfg_if.vld = instr_vld[cfg_idx_to_send[`MUX_1_TO_2_PSB_ID]];
                    if (instr_slt[cfg_idx_to_send[`MUX_1_TO_2_PSB_ID]].aru_psb2ub.arb_en)
                        u_aru_mux_1_to_2_psb_cfg_if.mode = 2'd1;  // 走上路
                    else u_aru_mux_1_to_2_psb_cfg_if.mode = 2'd0;  // 走下路
                end
                8'd49: begin  // aru_psb2gm
                    u_aru_mux_1_to_2_psb_cfg_if.vld = instr_vld[cfg_idx_to_send[`MUX_1_TO_2_PSB_ID]];
                    if (instr_slt[cfg_idx_to_send[`MUX_1_TO_2_PSB_ID]].aru_psb2gm.arb_en)
                        u_aru_mux_1_to_2_psb_cfg_if.mode = 2'd1;
                    else u_aru_mux_1_to_2_psb_cfg_if.mode = 2'd0;
                end
                8'd51: begin  // aru_dual2ub
                    u_aru_mux_1_to_2_psb_cfg_if.vld  = instr_vld[cfg_idx_to_send[`MUX_1_TO_2_PSB_ID]];
                    u_aru_mux_1_to_2_psb_cfg_if.mode = 2'd0;
                end
                default: begin
                    u_aru_mux_1_to_2_psb_cfg_if.vld  = 1'b0;
                    u_aru_mux_1_to_2_psb_cfg_if.mode = 2'd0;
                end
            endcase
        end


        if (cfg_en[`MUX_1_TO_4_UP_ID]) begin
            case (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].bin[7:0])
                8'd48: begin  // aru_psb2ub
                    u_aru_mux_1_to_4_up_cfg_if.vld = 1'b1;
                    if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_psb2ub.add_en |
                instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_psb2ub.sub_en)
                        u_aru_mux_1_to_4_up_cfg_if.mode = 2'd0;  // Add/Sub
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_psb2ub.mul_en)
                        u_aru_mux_1_to_4_up_cfg_if.mode = 2'd1;  // Mul
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_psb2ub.div_en)
                        u_aru_mux_1_to_4_up_cfg_if.mode = 2'd2;  // Div
                    else u_aru_mux_1_to_4_up_cfg_if.mode = 2'd3;  // Max/Min (default)
                end
                8'd49: begin  // aru_psb2gm
                    u_aru_mux_1_to_4_up_cfg_if.vld = 1'b1;
                    if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_psb2gm.add_en |
                instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_psb2gm.sub_en)
                        u_aru_mux_1_to_4_up_cfg_if.mode = 2'd0;
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_psb2gm.mul_en)
                        u_aru_mux_1_to_4_up_cfg_if.mode = 2'd1;
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_psb2gm.div_en)
                        u_aru_mux_1_to_4_up_cfg_if.mode = 2'd2;
                    else u_aru_mux_1_to_4_up_cfg_if.mode = 2'd3;
                end
                8'd50: begin  // aru_ub2ub
                    u_aru_mux_1_to_4_up_cfg_if.vld = 1'b1;
                    if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_ub2ub.add_en |
                instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_ub2ub.sub_en)
                        u_aru_mux_1_to_4_up_cfg_if.mode = 2'd0;
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_ub2ub.mul_en)
                        u_aru_mux_1_to_4_up_cfg_if.mode = 2'd1;
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_ub2ub.div_en)
                        u_aru_mux_1_to_4_up_cfg_if.mode = 2'd2;
                    else u_aru_mux_1_to_4_up_cfg_if.mode = 2'd3;
                end
                8'd51: begin  // aru_dual2ub
                    u_aru_mux_1_to_4_up_cfg_if.vld = 1'b1;
                    if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_dual2ub.add_en |
                instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_dual2ub.sub_en)
                        u_aru_mux_1_to_4_up_cfg_if.mode = 2'd0;
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_dual2ub.mul_en)
                        u_aru_mux_1_to_4_up_cfg_if.mode = 2'd1;
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_dual2ub.div_en)
                        u_aru_mux_1_to_4_up_cfg_if.mode = 2'd2;
                    else u_aru_mux_1_to_4_up_cfg_if.mode = 2'd3;
                end
                8'd52: begin  // aru_ub2gm
                    u_aru_mux_1_to_4_up_cfg_if.vld = 1'b1;
                    if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_ub2gm.add_en |
                instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_ub2gm.sub_en)
                        u_aru_mux_1_to_4_up_cfg_if.mode = 2'd0;
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_ub2gm.mul_en)
                        u_aru_mux_1_to_4_up_cfg_if.mode = 2'd1;
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_ub2gm.div_en)
                        u_aru_mux_1_to_4_up_cfg_if.mode = 2'd2;
                    else u_aru_mux_1_to_4_up_cfg_if.mode = 2'd3;
                end
                8'd53: begin  // aru_arb2arb
                    u_aru_mux_1_to_4_up_cfg_if.vld = 1'b1;
                    if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_arb2arb.add_en |
                instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_arb2arb.sub_en)
                        u_aru_mux_1_to_4_up_cfg_if.mode = 2'd0;
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_arb2arb.mul_en)
                        u_aru_mux_1_to_4_up_cfg_if.mode = 2'd1;
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_UP_ID]].aru_arb2arb.div_en)
                        u_aru_mux_1_to_4_up_cfg_if.mode = 2'd2;
                    else u_aru_mux_1_to_4_up_cfg_if.mode = 2'd3;
                end
                default: begin
                    u_aru_mux_1_to_4_up_cfg_if.vld  = 1'b0;
                    u_aru_mux_1_to_4_up_cfg_if.mode = 2'd3;  // 默认连接到Max/Min
                end
            endcase
        end

        if (cfg_en[`MUX_1_TO_4_DOWN_ID]) begin
            u_aru_mux_1_to_4_down_cfg_if.vld = 1'b1;
            case (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].bin[7:0])
                8'd48: begin  // aru_psb2ub
                    if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_psb2ub.add_en |
                        instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_psb2ub.sub_en)
                        u_aru_mux_1_to_4_down_cfg_if.mode = 2'd3;  // Add/Sub模块
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_psb2ub.div_en)
                        u_aru_mux_1_to_4_down_cfg_if.mode = 2'd1;  // Div模块  
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_psb2ub.mul_en)
                        u_aru_mux_1_to_4_down_cfg_if.mode = 2'd2;  // Mul模块
                    else u_aru_mux_1_to_4_down_cfg_if.mode = 2'd0;  // Max/Min模块
                end

                8'd49: begin  // aru_psb2gm
                    if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_psb2gm.add_en |
                        instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_psb2gm.sub_en)
                        u_aru_mux_1_to_4_down_cfg_if.mode = 2'd3;  // Add/Sub模块
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_psb2gm.div_en)
                        u_aru_mux_1_to_4_down_cfg_if.mode = 2'd1;  // Div模块
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_psb2gm.mul_en)
                        u_aru_mux_1_to_4_down_cfg_if.mode = 2'd2;  // Mul模块
                    else u_aru_mux_1_to_4_down_cfg_if.mode = 2'd0;  // Max/Min模块
                end

                8'd50: begin  // aru_ub2ub
                    if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_ub2ub.add_en |
                        instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_ub2ub.sub_en)
                        u_aru_mux_1_to_4_down_cfg_if.mode = 2'd3;  // Add/Sub模块
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_ub2ub.div_en)
                        u_aru_mux_1_to_4_down_cfg_if.mode = 2'd1;  // Div模块
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_ub2ub.mul_en)
                        u_aru_mux_1_to_4_down_cfg_if.mode = 2'd2;  // Mul模块
                    else u_aru_mux_1_to_4_down_cfg_if.mode = 2'd0;  // Max/Min模块
                end

                8'd51: begin  // aru_dual2ub
                    if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_dual2ub.add_en |
                        instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_dual2ub.sub_en)
                        u_aru_mux_1_to_4_down_cfg_if.mode = 2'd3;  // Add/Sub模块
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_dual2ub.div_en)
                        u_aru_mux_1_to_4_down_cfg_if.mode = 2'd1;  // Div模块
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_dual2ub.mul_en)
                        u_aru_mux_1_to_4_down_cfg_if.mode = 2'd2;  // Mul模块
                    else u_aru_mux_1_to_4_down_cfg_if.mode = 2'd0;  // Max/Min模块
                end

                8'd52: begin  // aru_ub2gm
                    if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_ub2gm.min_en |
                        instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_ub2gm.max_en)
                        u_aru_mux_1_to_4_down_cfg_if.mode = 2'd3;  // Add/Sub模块
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_ub2gm.div_en)
                        u_aru_mux_1_to_4_down_cfg_if.mode = 2'd1;  // Div模块
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_ub2gm.mul_en)
                        u_aru_mux_1_to_4_down_cfg_if.mode = 2'd2;  // Mul模块
                    else u_aru_mux_1_to_4_down_cfg_if.mode = 2'd0;  // Max/Min模块
                end

                8'd53: begin  // aru_arb2arb
                    if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_arb2arb.min_en |
                        instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_arb2arb.max_en)
                        u_aru_mux_1_to_4_down_cfg_if.mode = 2'd3;  // Add/Sub模块
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_arb2arb.div_en)
                        u_aru_mux_1_to_4_down_cfg_if.mode = 2'd1;  // Div模块
                    else if (instr_slt[cfg_idx_to_send[`MUX_1_TO_4_DOWN_ID]].aru_arb2arb.mul_en)
                        u_aru_mux_1_to_4_down_cfg_if.mode = 2'd2;  // Mul模块
                    else u_aru_mux_1_to_4_down_cfg_if.mode = 2'd0;  // Max/Min模块
                end

                default: begin
                    u_aru_mux_1_to_4_down_cfg_if.vld  = 1'b0;
                    u_aru_mux_1_to_4_down_cfg_if.mode = 2'd0;  // 默认选择Max/Min模块
                end
            endcase
        end

        if (cfg_en[`MUX_1_TO_3_UNARY_ID]) begin
            u_aru_mux_1_to_3_unary_cfg_if.vld = 1'b1;
            case (instr_slt[cfg_idx_to_send[`MUX_1_TO_3_UNARY_ID]].bin[7:0])
                8'd48: begin  // aru_psb2ub
                    if (instr_slt[cfg_idx_to_send[`MUX_1_TO_3_UNARY_ID]].aru_psb2ub.arb_wr_en) begin
                        u_aru_mux_1_to_3_unary_cfg_if.mode = 2'd3;  // 同时写UB和ARB
                    end else begin
                        u_aru_mux_1_to_3_unary_cfg_if.mode = 2'd2;  // 只写UB
                    end
                end
                8'd49: begin  // aru_psb2gm
                    u_aru_mux_1_to_3_unary_cfg_if.mode = 2'd1;  // 只写GM
                end
                8'd50: begin  // aru_ub2ub
                    if (instr_slt[cfg_idx_to_send[`MUX_1_TO_3_UNARY_ID]].aru_ub2ub.arb_wr_en) begin
                        u_aru_mux_1_to_3_unary_cfg_if.mode = 2'd3;  // 同时写UB和ARB
                    end else begin
                        u_aru_mux_1_to_3_unary_cfg_if.mode = 2'd2;  // 只写UB
                    end
                end
                8'd51: begin  // aru_dual2ub
                    if (instr_slt[cfg_idx_to_send[`MUX_1_TO_3_UNARY_ID]].aru_dual2ub.arb_wr_en) begin
                        u_aru_mux_1_to_3_unary_cfg_if.mode = 2'd3;  // 同时写UB和ARB
                    end else begin
                        u_aru_mux_1_to_3_unary_cfg_if.mode = 2'd2;  // 只写UB
                    end
                end
                8'd52: begin  // aru_ub2gm
                    u_aru_mux_1_to_3_unary_cfg_if.mode = 2'd1;  // 只写GM
                end
                8'd53: begin  // aru_arb2arb
                    u_aru_mux_1_to_3_unary_cfg_if.mode = 2'd0;  // 只写ARB
                end
                default: begin
                    u_aru_mux_1_to_3_unary_cfg_if.mode = 2'd0;  // bypass
                end
            endcase
        end else begin
            u_aru_mux_1_to_3_unary_cfg_if.vld  = 1'b0;
            u_aru_mux_1_to_3_unary_cfg_if.mode = 2'd0;
        end

        // 4. Binary运算单元配置
        // Add/Sub配置
        if (cfg_en[`ADD_SUB_ID]) begin
            u_aru_add_sub_cfg_if.vld = 1'b1;
            case (instr_slt[cfg_idx_to_send[`ADD_SUB_ID]].bin[7:0])
                8'd48: begin  // aru_psb2ub
                    u_aru_add_sub_cfg_if.add_sub = instr_slt[cfg_idx_to_send[`ADD_SUB_ID]].aru_psb2ub.sub_en; // 0:add, 1:sub
                    if (instr_slt[cfg_idx_to_send[`ADD_SUB_ID]].aru_psb2ub.scalar_en) begin
                        u_aru_add_sub_cfg_if.mode   = 3'd4;  // scalar模式
                        u_aru_add_sub_cfg_if.scalar = instr_slt[cfg_idx_to_send[`ADD_SUB_ID]].aru_psb2ub.scalar;
                    end else begin
                        u_aru_add_sub_cfg_if.mode   = 3'd3;  // 双输入计算模式
                        u_aru_add_sub_cfg_if.scalar = '0;
                    end
                end
                8'd49: begin  // aru_psb2gm 
                    u_aru_add_sub_cfg_if.add_sub = ~instr_slt[cfg_idx_to_send[`ADD_SUB_ID]].aru_psb2gm.sub_en;
                    if (instr_slt[cfg_idx_to_send[`ADD_SUB_ID]].aru_psb2gm.scalar_en) begin
                        u_aru_add_sub_cfg_if.mode   = 3'd4;
                        u_aru_add_sub_cfg_if.scalar = instr_slt[cfg_idx_to_send[`ADD_SUB_ID]].aru_psb2gm.scalar;
                    end else begin
                        u_aru_add_sub_cfg_if.mode   = 3'd3;
                        u_aru_add_sub_cfg_if.scalar = '0;
                    end
                end
                8'd50: begin  // aru_ub2ub
                    u_aru_add_sub_cfg_if.add_sub = ~instr_slt[cfg_idx_to_send[`ADD_SUB_ID]].aru_ub2ub.sub_en;
                    if (instr_slt[cfg_idx_to_send[`ADD_SUB_ID]].aru_ub2ub.scalar_en) begin
                        u_aru_add_sub_cfg_if.mode   = 3'd4;
                        u_aru_add_sub_cfg_if.scalar = instr_slt[cfg_idx_to_send[`ADD_SUB_ID]].aru_ub2ub.scalar;
                    end else begin
                        u_aru_add_sub_cfg_if.mode   = 3'd3;
                        u_aru_add_sub_cfg_if.scalar = '0;
                    end
                end
                8'd51: begin  // aru_dual2ub 无scalar模式
                    u_aru_add_sub_cfg_if.add_sub = ~instr_slt[cfg_idx_to_send[`ADD_SUB_ID]].aru_dual2ub.sub_en;
                    u_aru_add_sub_cfg_if.mode    = 3'd3;
                    u_aru_add_sub_cfg_if.scalar  = '0;
                end
                8'd52: begin  // aru_ub2gm
                    u_aru_add_sub_cfg_if.add_sub = ~instr_slt[cfg_idx_to_send[`ADD_SUB_ID]].aru_ub2gm.sub_en;
                    if (instr_slt[cfg_idx_to_send[`ADD_SUB_ID]].aru_ub2gm.scalar_en) begin
                        u_aru_add_sub_cfg_if.mode   = 3'd4;
                        u_aru_add_sub_cfg_if.scalar = instr_slt[cfg_idx_to_send[`ADD_SUB_ID]].aru_ub2gm.scalar;
                    end else begin
                        u_aru_add_sub_cfg_if.mode   = 3'd3;
                        u_aru_add_sub_cfg_if.scalar = '0;
                    end
                end
                8'd53: begin  // aru_arb2arb
                    u_aru_add_sub_cfg_if.add_sub = ~instr_slt[cfg_idx_to_send[`ADD_SUB_ID]].aru_arb2arb.sub_en;
                    if (instr_slt[cfg_idx_to_send[`ADD_SUB_ID]].aru_arb2arb.scalar_en) begin
                        u_aru_add_sub_cfg_if.mode   = 3'd4;
                        u_aru_add_sub_cfg_if.scalar = instr_slt[cfg_idx_to_send[`ADD_SUB_ID]].aru_arb2arb.scalar;
                    end else begin
                        u_aru_add_sub_cfg_if.mode   = 3'd3;
                        u_aru_add_sub_cfg_if.scalar = '0;
                    end
                end
                default: begin
                    u_aru_add_sub_cfg_if.vld     = 1'b0;
                    u_aru_add_sub_cfg_if.add_sub = 1'b0;
                    u_aru_add_sub_cfg_if.mode    = 3'd0;
                    u_aru_add_sub_cfg_if.scalar  = '0;
                end
            endcase
        end else begin
            u_aru_add_sub_cfg_if.vld     = 1'b0;
            u_aru_add_sub_cfg_if.add_sub = 1'b0;
            u_aru_add_sub_cfg_if.mode    = 3'd0;
            u_aru_add_sub_cfg_if.scalar  = '0;
        end

        // Mul配置
        if (cfg_en[`MUL_ID]) begin
            u_aru_mul_cfg_if.vld = 1'b1;
            case (instr_slt[cfg_idx_to_send[`MUL_ID]].bin[7:0])
                8'd48: begin  // aru_psb2ub
                    if (cfg_en[`ADD_SUB_ID] && ~instr_slt[cfg_idx_to_send[`MUL_ID]].aru_psb2ub.mul_en) begin
                        u_aru_mul_cfg_if.mode   = 3'd2;  // 与Add/Sub级联模式
                        u_aru_mul_cfg_if.scalar = '0;
                    end else if (instr_slt[cfg_idx_to_send[`MUL_ID]].aru_psb2ub.scalar_en && instr_slt[cfg_idx_to_send[`MUL_ID]].aru_psb2ub.mul_en) begin
                        u_aru_mul_cfg_if.mode   = 3'd4;
                        u_aru_mul_cfg_if.scalar = instr_slt[cfg_idx_to_send[`MUL_ID]].aru_psb2ub.scalar;
                    end else begin
                        u_aru_mul_cfg_if.mode   = 3'd3;
                        u_aru_mul_cfg_if.scalar = '0;
                    end
                end
                8'd49: begin  // aru_psb2gm
                    if (cfg_en[`ADD_SUB_ID] && ~instr_slt[cfg_idx_to_send[`MUL_ID]].aru_psb2gm.mul_en) begin
                        u_aru_mul_cfg_if.mode   = 3'd2;  // 与Add/Sub级联模式
                        u_aru_mul_cfg_if.scalar = '0;
                    end else if (instr_slt[cfg_idx_to_send[`MUL_ID]].aru_psb2gm.scalar_en && instr_slt[cfg_idx_to_send[`MUL_ID]].aru_psb2gm.mul_en) begin
                        u_aru_mul_cfg_if.mode   = 3'd4;
                        u_aru_mul_cfg_if.scalar = instr_slt[cfg_idx_to_send[`MUL_ID]].aru_psb2gm.scalar;
                    end else begin
                        u_aru_mul_cfg_if.mode   = 3'd3;
                        u_aru_mul_cfg_if.scalar = '0;
                    end
                end
                8'd50: begin  // aru_ub2ub
                    if (cfg_en[`ADD_SUB_ID] && ~instr_slt[cfg_idx_to_send[`MUL_ID]].aru_ub2ub.mul_en) begin
                        u_aru_mul_cfg_if.mode   = 3'd2;  // 与Add/Sub级联模式
                        u_aru_mul_cfg_if.scalar = '0;
                    end else if (instr_slt[cfg_idx_to_send[`MUL_ID]].aru_ub2ub.scalar_en && instr_slt[cfg_idx_to_send[`MUL_ID]].aru_ub2ub.mul_en) begin
                        u_aru_mul_cfg_if.mode   = 3'd4;
                        u_aru_mul_cfg_if.scalar = instr_slt[cfg_idx_to_send[`MUL_ID]].aru_ub2ub.scalar;
                    end else begin
                        u_aru_mul_cfg_if.mode   = 3'd3;
                        u_aru_mul_cfg_if.scalar = '0;
                    end
                end
                8'd51: begin  // aru_dual2ub
                    if (cfg_en[`ADD_SUB_ID] && ~instr_slt[cfg_idx_to_send[`MUL_ID]].aru_dual2ub.mul_en) begin
                        u_aru_mul_cfg_if.mode   = 3'd2;  // 与Add/Sub级联模式
                        u_aru_mul_cfg_if.scalar = '0;
                    end else begin
                        u_aru_mul_cfg_if.mode   = 3'd3;
                        u_aru_mul_cfg_if.scalar = '0;
                    end
                end
                8'd52: begin  // aru_ub2gm
                    if (cfg_en[`ADD_SUB_ID] && ~instr_slt[cfg_idx_to_send[`MUL_ID]].aru_ub2gm.mul_en) begin
                        u_aru_mul_cfg_if.mode   = 3'd2;  // 与Add/Sub级联模式
                        u_aru_mul_cfg_if.scalar = '0;
                    end else if (instr_slt[cfg_idx_to_send[`MUL_ID]].aru_ub2gm.scalar_en) begin
                        u_aru_mul_cfg_if.mode   = 3'd4;
                        u_aru_mul_cfg_if.scalar = instr_slt[cfg_idx_to_send[`MUL_ID]].aru_ub2gm.scalar;
                    end else begin
                        u_aru_mul_cfg_if.mode   = 3'd3;
                        u_aru_mul_cfg_if.scalar = '0;
                    end
                end
                8'd53: begin  // aru_arb2arb
                    if (cfg_en[`ADD_SUB_ID] && ~instr_slt[cfg_idx_to_send[`MUL_ID]].aru_arb2arb.mul_en) begin
                        u_aru_mul_cfg_if.mode   = 3'd2;  // 与Add/Sub级联模式
                        u_aru_mul_cfg_if.scalar = '0;
                    end else if (instr_slt[cfg_idx_to_send[`MUL_ID]].aru_arb2arb.scalar_en && instr_slt[cfg_idx_to_send[`MUL_ID]].aru_arb2arb.mul_en) begin
                        u_aru_mul_cfg_if.mode   = 3'd4;
                        u_aru_mul_cfg_if.scalar = instr_slt[cfg_idx_to_send[`MUL_ID]].aru_arb2arb.scalar;
                    end else begin
                        u_aru_mul_cfg_if.mode   = 3'd3;
                        u_aru_mul_cfg_if.scalar = '0;
                    end
                end
                default: begin
                    u_aru_mul_cfg_if.vld    = 1'b0;
                    u_aru_mul_cfg_if.mode   = 3'd0;
                    u_aru_mul_cfg_if.scalar = '0;
                end
            endcase
        end else begin
            u_aru_mul_cfg_if.vld    = 1'b0;
            u_aru_mul_cfg_if.mode   = 3'd0;
            u_aru_mul_cfg_if.scalar = '0;
        end

        // Div配置
        if (cfg_en[`DIV_ID]) begin
            u_aru_div_cfg_if.vld = 1'b1;
            case (instr_slt[cfg_idx_to_send[`DIV_ID]].bin[7:0])
                8'd48: begin  // aru_psb2ub
                    if (cfg_en[`MUL_ID] && ~instr_slt[cfg_idx_to_send[`DIV_ID]].aru_psb2ub.div_en) begin
                        u_aru_div_cfg_if.mode   = 3'd2;  // 与MUL级联模式
                        u_aru_div_cfg_if.scalar = '0;
                    end else if (instr_slt[cfg_idx_to_send[`DIV_ID]].aru_psb2ub.scalar_en && instr_slt[cfg_idx_to_send[`DIV_ID]].aru_psb2ub.div_en) begin
                        u_aru_div_cfg_if.mode   = 3'd4;
                        u_aru_div_cfg_if.scalar = instr_slt[cfg_idx_to_send[`DIV_ID]].aru_psb2ub.scalar;
                    end else begin
                        u_aru_div_cfg_if.mode   = 3'd3;
                        u_aru_div_cfg_if.scalar = '0;
                    end
                end
                8'd49: begin  // aru_psb2gm
                    if (cfg_en[`MUL_ID] && ~instr_slt[cfg_idx_to_send[`DIV_ID]].aru_psb2gm.div_en) begin
                        u_aru_div_cfg_if.mode   = 3'd2;  // 与MUL级联模式
                        u_aru_div_cfg_if.scalar = '0;
                    end else if (instr_slt[cfg_idx_to_send[`DIV_ID]].aru_psb2gm.scalar_en && instr_slt[cfg_idx_to_send[`DIV_ID]].aru_psb2gm.div_en) begin
                        u_aru_div_cfg_if.mode   = 3'd4;
                        u_aru_div_cfg_if.scalar = instr_slt[cfg_idx_to_send[`DIV_ID]].aru_psb2gm.scalar;
                    end else begin
                        u_aru_div_cfg_if.mode   = 3'd3;
                        u_aru_div_cfg_if.scalar = '0;
                    end
                end
                8'd50: begin  // aru_ub2ub
                    if (cfg_en[`MUL_ID] && ~instr_slt[cfg_idx_to_send[`DIV_ID]].aru_ub2ub.div_en) begin
                        u_aru_div_cfg_if.mode   = 3'd2;  // 与MUL级联模式
                        u_aru_div_cfg_if.scalar = '0;
                    end else if (instr_slt[cfg_idx_to_send[`DIV_ID]].aru_ub2ub.scalar_en && instr_slt[cfg_idx_to_send[`DIV_ID]].aru_ub2ub.div_en) begin
                        u_aru_div_cfg_if.mode   = 3'd4;
                        u_aru_div_cfg_if.scalar = instr_slt[cfg_idx_to_send[`DIV_ID]].aru_ub2ub.scalar;
                    end else begin
                        u_aru_div_cfg_if.mode   = 3'd3;
                        u_aru_div_cfg_if.scalar = '0;
                    end
                end
                8'd51: begin  // aru_dual2ub
                    if (cfg_en[`MUL_ID] && ~instr_slt[cfg_idx_to_send[`DIV_ID]].aru_dual2ub.div_en) begin
                        u_aru_div_cfg_if.mode   = 3'd2;  // 与MUL级联模式
                        u_aru_div_cfg_if.scalar = '0;
                    end else begin
                        u_aru_div_cfg_if.mode   = 3'd3;
                        u_aru_div_cfg_if.scalar = '0;
                    end
                end
                8'd52: begin  // aru_ub2gm
                    if (cfg_en[`MUL_ID] && ~instr_slt[cfg_idx_to_send[`DIV_ID]].aru_ub2gm.div_en) begin
                        u_aru_div_cfg_if.mode   = 3'd2;  // 与MUL级联模式
                        u_aru_div_cfg_if.scalar = '0;
                    end else if (instr_slt[cfg_idx_to_send[`DIV_ID]].aru_ub2gm.scalar_en && instr_slt[cfg_idx_to_send[`DIV_ID]].aru_ub2gm.div_en) begin
                        u_aru_div_cfg_if.mode   = 3'd4;
                        u_aru_div_cfg_if.scalar = instr_slt[cfg_idx_to_send[`DIV_ID]].aru_ub2gm.scalar;
                    end else begin
                        u_aru_div_cfg_if.mode   = 3'd3;
                        u_aru_div_cfg_if.scalar = '0;
                    end
                end
                8'd53: begin  // aru_arb2arb
                    if (cfg_en[`MUL_ID] && ~instr_slt[cfg_idx_to_send[`DIV_ID]].aru_arb2arb.div_en) begin
                        u_aru_div_cfg_if.mode   = 3'd2;  // 与MUL级联模式
                        u_aru_div_cfg_if.scalar = '0;
                    end else if (instr_slt[cfg_idx_to_send[`DIV_ID]].aru_arb2arb.scalar_en) begin
                        u_aru_div_cfg_if.mode   = 3'd4;
                        u_aru_div_cfg_if.scalar = instr_slt[cfg_idx_to_send[`DIV_ID]].aru_arb2arb.scalar;
                    end else begin
                        u_aru_div_cfg_if.mode   = 3'd3;
                        u_aru_div_cfg_if.scalar = '0;
                    end
                end
                default: begin
                    u_aru_div_cfg_if.vld    = 1'b0;
                    u_aru_div_cfg_if.mode   = 3'd0;
                    u_aru_div_cfg_if.scalar = '0;
                end
            endcase
        end else begin
            u_aru_div_cfg_if.vld    = 1'b0;
            u_aru_div_cfg_if.mode   = 3'd0;
            u_aru_div_cfg_if.scalar = '0;
        end

        // Max/Min配置
        if (cfg_en[`MAX_MIN_ID]) begin
            u_aru_max_min_cfg_if.vld = 1'b1;
            case (instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].bin[7:0])
                8'd48: begin  // aru_psb2ub
                    u_aru_max_min_cfg_if.max_min = instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_psb2ub.min_en;
                    if (~cfg_en[`ADD_SUB_ID] && ~cfg_en[`MUL_ID] && ~cfg_en[`DIV_ID] &&
                        ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_psb2ub.max_en &&
                        ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_psb2ub.min_en) begin // 上下bypass情况
                        if (cfg_en[`MUX_1_TO_4_UP_ID]) begin
                            u_aru_max_min_cfg_if.mode   = 3'd0;  // 连接到Mux_1_to_4_up
                            u_aru_max_min_cfg_if.scalar = '0;
                        end else begin
                            u_aru_max_min_cfg_if.mode   = 3'd1;  // 连接到Mux_1_to_4_down
                            u_aru_max_min_cfg_if.scalar = '0;
                        end
                    end else if (cfg_en[`DIV_ID] && ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_psb2ub.max_en &&
                        ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_psb2ub.min_en) begin // Div级联情况
                        u_aru_max_min_cfg_if.mode   = 3'd2;  // 连接到Div
                        u_aru_max_min_cfg_if.scalar = '0;
                    end else if (instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_psb2ub.scalar_en) begin
                        u_aru_max_min_cfg_if.mode   = 3'd4;
                        u_aru_max_min_cfg_if.scalar = instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_psb2ub.scalar;
                    end else begin
                        u_aru_max_min_cfg_if.mode   = 3'd3;
                        u_aru_max_min_cfg_if.scalar = '0;
                    end
                end
                8'd49: begin  // aru_psb2gm
                    u_aru_max_min_cfg_if.max_min = instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_psb2gm.min_en;
                    if (~cfg_en[`ADD_SUB_ID] && ~cfg_en[`MUL_ID] && ~cfg_en[`DIV_ID] &&
                        ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_psb2gm.max_en &&
                        ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_psb2gm.min_en) begin // 上下bypass情况
                        if (cfg_en[`MUX_1_TO_4_UP_ID]) begin
                            u_aru_max_min_cfg_if.mode   = 3'd0;  // 连接到Mux_1_to_4_up
                            u_aru_max_min_cfg_if.scalar = '0;
                        end else begin
                            u_aru_max_min_cfg_if.mode   = 3'd1;  // 连接到Mux_1_to_4_down
                            u_aru_max_min_cfg_if.scalar = '0;
                        end
                    end else if (cfg_en[`DIV_ID] && ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_psb2gm.max_en &&
                        ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_psb2gm.min_en) begin // Div级联情况
                        u_aru_max_min_cfg_if.mode   = 3'd2;  // 连接到Div
                        u_aru_max_min_cfg_if.scalar = '0;
                    end else if (instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_psb2gm.scalar_en) begin
                        u_aru_max_min_cfg_if.mode   = 3'd4;
                        u_aru_max_min_cfg_if.scalar = instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_psb2gm.scalar;
                    end else begin
                        u_aru_max_min_cfg_if.mode   = 3'd3;
                        u_aru_max_min_cfg_if.scalar = '0;
                    end
                end
                8'd50: begin  // aru_ub2ub
                    u_aru_max_min_cfg_if.max_min = instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_ub2ub.min_en;
                    if (~cfg_en[`ADD_SUB_ID] && ~cfg_en[`MUL_ID] && ~cfg_en[`DIV_ID] &&
                        ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_ub2ub.max_en &&
                        ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_ub2ub.min_en) begin // 上下bypass情况
                        if (cfg_en[`MUX_1_TO_4_UP_ID]) begin
                            u_aru_max_min_cfg_if.mode   = 3'd0;  // 连接到Mux_1_to_4_up
                            u_aru_max_min_cfg_if.scalar = '0;
                        end else begin
                            u_aru_max_min_cfg_if.mode   = 3'd1;  // 连接到Mux_1_to_4_down
                            u_aru_max_min_cfg_if.scalar = '0;
                        end
                    end else if (cfg_en[`DIV_ID] && ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_ub2ub.max_en &&
                        ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_ub2ub.min_en) begin // Div级联情况
                        u_aru_max_min_cfg_if.mode   = 3'd2;  // 连接到Div
                        u_aru_max_min_cfg_if.scalar = '0;
                    end else if (instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_ub2ub.scalar_en) begin
                        u_aru_max_min_cfg_if.mode   = 3'd4;
                        u_aru_max_min_cfg_if.scalar = instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_ub2ub.scalar;
                    end else begin
                        u_aru_max_min_cfg_if.mode   = 3'd3;
                        u_aru_max_min_cfg_if.scalar = '0;
                    end
                end
                8'd51: begin  // aru_dual2ub
                    u_aru_max_min_cfg_if.max_min = instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_dual2ub.min_en;
                    if (~cfg_en[`ADD_SUB_ID] && ~cfg_en[`MUL_ID] && ~cfg_en[`DIV_ID] &&
                        ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_dual2ub.max_en &&
                        ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_dual2ub.min_en) begin // 上下bypass情况
                        if (cfg_en[`MUX_1_TO_4_UP_ID]) begin
                            u_aru_max_min_cfg_if.mode   = 3'd0;  // 连接到Mux_1_to_4_up
                            u_aru_max_min_cfg_if.scalar = '0;
                        end else begin
                            u_aru_max_min_cfg_if.mode   = 3'd1;  // 连接到Mux_1_to_4_down
                            u_aru_max_min_cfg_if.scalar = '0;
                        end
                    end else if (cfg_en[`DIV_ID] && ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_dual2ub.max_en &&
                        ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_dual2ub.min_en) begin // Div级联情况
                        u_aru_max_min_cfg_if.mode   = 3'd2;  // 连接到Div
                        u_aru_max_min_cfg_if.scalar = '0;
                    end else begin
                        u_aru_max_min_cfg_if.mode   = 3'd3;
                        u_aru_max_min_cfg_if.scalar = '0;
                    end
                end
                8'd52: begin  // aru_ub2gm
                    u_aru_max_min_cfg_if.max_min = instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_ub2gm.min_en;
                    if (~cfg_en[`ADD_SUB_ID] && ~cfg_en[`MUL_ID] && ~cfg_en[`DIV_ID] &&
                        ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_ub2gm.max_en &&
                        ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_ub2gm.min_en) begin // 上下bypass情况
                        if (cfg_en[`MUX_1_TO_4_UP_ID]) begin
                            u_aru_max_min_cfg_if.mode   = 3'd0;  // 连接到Mux_1_to_4_up
                            u_aru_max_min_cfg_if.scalar = '0;
                        end else begin
                            u_aru_max_min_cfg_if.mode   = 3'd1;  // 连接到Mux_1_to_4_down
                            u_aru_max_min_cfg_if.scalar = '0;
                        end
                    end else if (cfg_en[`DIV_ID] && ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_ub2gm.max_en &&
                        ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_ub2gm.min_en) begin // Div级联情况
                        u_aru_max_min_cfg_if.mode   = 3'd2;  // 连接到Div
                        u_aru_max_min_cfg_if.scalar = '0;
                    end else if (instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_ub2gm.scalar_en) begin
                        u_aru_max_min_cfg_if.mode   = 3'd4;
                        u_aru_max_min_cfg_if.scalar = instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_ub2gm.scalar;
                    end else begin
                        u_aru_max_min_cfg_if.mode   = 3'd3;
                        u_aru_max_min_cfg_if.scalar = '0;
                    end
                end
                8'd53: begin  // aru_arb2arb
                    u_aru_max_min_cfg_if.max_min = instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_arb2arb.min_en;
                    if (~cfg_en[`ADD_SUB_ID] && ~cfg_en[`MUL_ID] && ~cfg_en[`DIV_ID] &&
                        ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_arb2arb.max_en &&
                        ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_arb2arb.min_en) begin // 上下bypass情况
                        if (cfg_en[`MUX_1_TO_4_UP_ID]) begin
                            u_aru_max_min_cfg_if.mode   = 3'd0;  // 连接到Mux_1_to_4_up
                            u_aru_max_min_cfg_if.scalar = '0;
                        end else begin
                            u_aru_max_min_cfg_if.mode   = 3'd1;  // 连接到Mux_1_to_4_down
                            u_aru_max_min_cfg_if.scalar = '0;
                        end
                    end else if (cfg_en[`DIV_ID] && ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_arb2arb.max_en &&
                        ~instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_arb2arb.min_en) begin // Div级联情况
                        u_aru_max_min_cfg_if.mode   = 3'd2;  // 连接到Div
                        u_aru_max_min_cfg_if.scalar = '0;
                    end else if (instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_arb2arb.scalar_en) begin
                        u_aru_max_min_cfg_if.mode   = 3'd4;
                        u_aru_max_min_cfg_if.scalar = instr_slt[cfg_idx_to_send[`MAX_MIN_ID]].aru_arb2arb.scalar;
                    end else begin
                        u_aru_max_min_cfg_if.mode   = 3'd3;
                        u_aru_max_min_cfg_if.scalar = '0;
                    end
                end
                default: begin
                    u_aru_max_min_cfg_if.vld     = 1'b0;
                    u_aru_max_min_cfg_if.max_min = 1'b0;
                    u_aru_max_min_cfg_if.mode    = 3'd0;
                    u_aru_max_min_cfg_if.scalar  = '0;
                end
            endcase
        end else begin
            u_aru_max_min_cfg_if.vld     = 1'b0;
            u_aru_max_min_cfg_if.max_min = 1'b0;
            u_aru_max_min_cfg_if.mode    = 3'd0;
            u_aru_max_min_cfg_if.scalar  = '0;
        end

        // 5. Unary运算单元配置
        // Neg配置
        if (cfg_en[`NEG_ID]) begin
            u_aru_neg_cfg_if.vld = 1'b1;
            case (instr_slt[cfg_idx_to_send[`NEG_ID]].bin[7:0])
                8'd48: begin  // aru_psb2ub
                    u_aru_neg_cfg_if.en = instr_slt[cfg_idx_to_send[`NEG_ID]].aru_psb2ub.neg_en;
                end
                8'd49: begin  // aru_psb2gm
                    u_aru_neg_cfg_if.en = instr_slt[cfg_idx_to_send[`NEG_ID]].aru_psb2gm.neg_en;
                end
                8'd50: begin  // aru_ub2ub
                    u_aru_neg_cfg_if.en = instr_slt[cfg_idx_to_send[`NEG_ID]].aru_ub2ub.neg_en;
                end
                8'd51: begin  // aru_dual2ub
                    u_aru_neg_cfg_if.en = instr_slt[cfg_idx_to_send[`NEG_ID]].aru_dual2ub.neg_en;
                end
                8'd52: begin  // aru_ub2gm
                    u_aru_neg_cfg_if.en = instr_slt[cfg_idx_to_send[`NEG_ID]].aru_ub2gm.neg_en;
                end
                8'd53: begin  // aru_arb2arb
                    u_aru_neg_cfg_if.en = instr_slt[cfg_idx_to_send[`NEG_ID]].aru_arb2arb.neg_en;
                end
                default: begin
                    u_aru_neg_cfg_if.en = 1'b0;
                end
            endcase
        end else begin
            u_aru_neg_cfg_if.vld = 1'b0;
            u_aru_neg_cfg_if.en  = 1'b0;
        end

        // Clamp配置
        if (cfg_en[`CLAMP_ID]) begin
            u_aru_clamp_cfg_if.vld = 1'b1;
            case (instr_slt[cfg_idx_to_send[`CLAMP_ID]].bin[7:0])
                8'd48: begin  // aru_psb2ub
                    u_aru_clamp_cfg_if.en = instr_slt[cfg_idx_to_send[`CLAMP_ID]].aru_psb2ub.clamp_en;
                end
                8'd49: begin  // aru_psb2gm
                    u_aru_clamp_cfg_if.en = instr_slt[cfg_idx_to_send[`CLAMP_ID]].aru_psb2gm.clamp_en;
                end
                8'd50: begin  // aru_ub2ub
                    u_aru_clamp_cfg_if.en = instr_slt[cfg_idx_to_send[`CLAMP_ID]].aru_ub2ub.clamp_en;
                end
                8'd51: begin  // aru_dual2ub
                    u_aru_clamp_cfg_if.en = instr_slt[cfg_idx_to_send[`CLAMP_ID]].aru_dual2ub.clamp_en;
                end
                8'd52: begin  // aru_ub2gm
                    u_aru_clamp_cfg_if.en = instr_slt[cfg_idx_to_send[`CLAMP_ID]].aru_ub2gm.clamp_en;
                end
                8'd53: begin  // aru_arb2arb
                    u_aru_clamp_cfg_if.en = instr_slt[cfg_idx_to_send[`CLAMP_ID]].aru_arb2arb.clamp_en;
                end
                default: begin
                    u_aru_clamp_cfg_if.en = 1'b0;
                end
            endcase
        end else begin
            u_aru_clamp_cfg_if.vld = 1'b0;
            u_aru_clamp_cfg_if.en  = 1'b0;
        end

        // Exp配置
        if (cfg_en[`EXP_ID]) begin
            u_aru_exp_cfg_if.vld = 1'b1;
            case (instr_slt[cfg_idx_to_send[`EXP_ID]].bin[7:0])
                8'd48: begin  // aru_psb2ub
                    u_aru_exp_cfg_if.en = instr_slt[cfg_idx_to_send[`EXP_ID]].aru_psb2ub.exp_en;
                end
                8'd49: begin  // aru_psb2gm
                    u_aru_exp_cfg_if.en = instr_slt[cfg_idx_to_send[`EXP_ID]].aru_psb2gm.exp_en;
                end
                8'd50: begin  // aru_ub2ub
                    u_aru_exp_cfg_if.en = instr_slt[cfg_idx_to_send[`EXP_ID]].aru_ub2ub.exp_en;
                end
                8'd51: begin  // aru_dual2ub
                    u_aru_exp_cfg_if.en = instr_slt[cfg_idx_to_send[`EXP_ID]].aru_dual2ub.exp_en;
                end
                8'd52: begin  // aru_ub2gm
                    u_aru_exp_cfg_if.en = instr_slt[cfg_idx_to_send[`EXP_ID]].aru_ub2gm.exp_en;
                end
                8'd53: begin  // aru_arb2arb
                    u_aru_exp_cfg_if.en = instr_slt[cfg_idx_to_send[`EXP_ID]].aru_arb2arb.exp_en;
                end
                default: begin
                    u_aru_exp_cfg_if.en = 1'b0;
                end
            endcase
        end else begin
            u_aru_exp_cfg_if.vld = 1'b0;
            u_aru_exp_cfg_if.en  = 1'b0;
        end

        // Sqrt配置
        if (cfg_en[`SQRT_ID]) begin
            u_aru_sqrt_cfg_if.vld = 1'b1;
            case (instr_slt[cfg_idx_to_send[`SQRT_ID]].bin[7:0])
                8'd48: begin  // aru_psb2ub
                    u_aru_sqrt_cfg_if.en = instr_slt[cfg_idx_to_send[`SQRT_ID]].aru_psb2ub.sqrt_en;
                end
                8'd49: begin  // aru_psb2gm
                    u_aru_sqrt_cfg_if.en = instr_slt[cfg_idx_to_send[`SQRT_ID]].aru_psb2gm.sqrt_en;
                end
                8'd50: begin  // aru_ub2ub
                    u_aru_sqrt_cfg_if.en = instr_slt[cfg_idx_to_send[`SQRT_ID]].aru_ub2ub.sqrt_en;
                end
                8'd51: begin  // aru_dual2ub
                    u_aru_sqrt_cfg_if.en = instr_slt[cfg_idx_to_send[`SQRT_ID]].aru_dual2ub.sqrt_en;
                end
                8'd52: begin  // aru_ub2gm
                    u_aru_sqrt_cfg_if.en = instr_slt[cfg_idx_to_send[`SQRT_ID]].aru_ub2gm.sqrt_en;
                end
                8'd53: begin  // aru_arb2arb
                    u_aru_sqrt_cfg_if.en = instr_slt[cfg_idx_to_send[`SQRT_ID]].aru_arb2arb.sqrt_en;
                end
                default: begin
                    u_aru_sqrt_cfg_if.en = 1'b0;
                end
            endcase
        end else begin
            u_aru_sqrt_cfg_if.vld = 1'b0;
            u_aru_sqrt_cfg_if.en  = 1'b0;
        end

        // Pow配置
        if (cfg_en[`POW_ID]) begin
            u_aru_pow_cfg_if.vld = 1'b1;
            case (instr_slt[cfg_idx_to_send[`POW_ID]].bin[7:0])
                8'd48: begin  // aru_psb2ub
                    u_aru_pow_cfg_if.en = instr_slt[cfg_idx_to_send[`POW_ID]].aru_psb2ub.pow_en;
                end
                8'd49: begin  // aru_psb2gm
                    u_aru_pow_cfg_if.en = instr_slt[cfg_idx_to_send[`POW_ID]].aru_psb2gm.pow_en;
                end
                8'd50: begin  // aru_ub2ub
                    u_aru_pow_cfg_if.en = instr_slt[cfg_idx_to_send[`POW_ID]].aru_ub2ub.pow_en;
                end
                8'd51: begin  // aru_dual2ub
                    u_aru_pow_cfg_if.en = instr_slt[cfg_idx_to_send[`POW_ID]].aru_dual2ub.pow_en;
                end
                8'd52: begin  // aru_ub2gm
                    u_aru_pow_cfg_if.en = instr_slt[cfg_idx_to_send[`POW_ID]].aru_ub2gm.pow_en;
                end
                8'd53: begin  // aru_arb2arb
                    u_aru_pow_cfg_if.en = instr_slt[cfg_idx_to_send[`POW_ID]].aru_arb2arb.pow_en;
                end
                default: begin
                    u_aru_pow_cfg_if.en = 1'b0;
                end
            endcase
        end else begin
            u_aru_pow_cfg_if.vld = 1'b0;
            u_aru_pow_cfg_if.en  = 1'b0;
        end

        // Recp配置
        if (cfg_en[`RECP_ID]) begin
            u_aru_recp_cfg_if.vld = 1'b1;
            case (instr_slt[cfg_idx_to_send[`RECP_ID]].bin[7:0])
                8'd48: begin  // aru_psb2ub
                    u_aru_recp_cfg_if.en = instr_slt[cfg_idx_to_send[`RECP_ID]].aru_psb2ub.recp_en;
                end
                8'd49: begin  // aru_psb2gm
                    u_aru_recp_cfg_if.en = instr_slt[cfg_idx_to_send[`RECP_ID]].aru_psb2gm.recp_en;
                end
                8'd50: begin  // aru_ub2ub
                    u_aru_recp_cfg_if.en = instr_slt[cfg_idx_to_send[`RECP_ID]].aru_ub2ub.recp_en;
                end
                8'd51: begin  // aru_dual2ub
                    u_aru_recp_cfg_if.en = instr_slt[cfg_idx_to_send[`RECP_ID]].aru_dual2ub.recp_en;
                end
                8'd52: begin  // aru_ub2gm
                    u_aru_recp_cfg_if.en = instr_slt[cfg_idx_to_send[`RECP_ID]].aru_ub2gm.recp_en;
                end
                8'd53: begin  // aru_arb2arb
                    u_aru_recp_cfg_if.en = instr_slt[cfg_idx_to_send[`RECP_ID]].aru_arb2arb.recp_en;
                end
                default: begin
                    u_aru_recp_cfg_if.en = 1'b0;
                end
            endcase
        end else begin
            u_aru_recp_cfg_if.vld = 1'b0;
            u_aru_recp_cfg_if.en  = 1'b0;
        end

        // 6. Reduce运算配置
        if (cfg_en[`REDUCE_ID]) begin
            u_aru_reduce_cfg_if.vld = 1'b1;
            case (instr_slt[cfg_idx_to_send[`REDUCE_ID]].bin[7:0])
                8'd48: begin  // aru_psb2ub
                    u_aru_reduce_cfg_if.reduce_m  = instr_slt[cfg_idx_to_send[`REDUCE_ID]].aru_psb2ub.reduce_m_en;
                    u_aru_reduce_cfg_if.reduce_n  = instr_slt[cfg_idx_to_send[`REDUCE_ID]].aru_psb2ub.reduce_n_en;
                    u_aru_reduce_cfg_if.reduce_op = instr_slt[cfg_idx_to_send[`REDUCE_ID]].aru_psb2ub.reduce_mode;
                    u_aru_reduce_cfg_if.slice_m   = instr_slt[cfg_idx_to_send[`REDUCE_ID]].aru_psb2ub.slice_m;
                    u_aru_reduce_cfg_if.slice_n   = instr_slt[cfg_idx_to_send[`REDUCE_ID]].aru_psb2ub.slice_n;
                end
                8'd50: begin  // aru_ub2ub
                    u_aru_reduce_cfg_if.reduce_m  = instr_slt[cfg_idx_to_send[`REDUCE_ID]].aru_ub2ub.reduce_m_en;
                    u_aru_reduce_cfg_if.reduce_n  = instr_slt[cfg_idx_to_send[`REDUCE_ID]].aru_ub2ub.reduce_n_en;
                    u_aru_reduce_cfg_if.reduce_op = instr_slt[cfg_idx_to_send[`REDUCE_ID]].aru_ub2ub.reduce_mode;
                    u_aru_reduce_cfg_if.slice_m   = instr_slt[cfg_idx_to_send[`REDUCE_ID]].aru_ub2ub.slice_m;
                    u_aru_reduce_cfg_if.slice_n   = instr_slt[cfg_idx_to_send[`REDUCE_ID]].aru_ub2ub.slice_n;
                end
                8'd51: begin  // aru_dual2ub
                    u_aru_reduce_cfg_if.reduce_m  = instr_slt[cfg_idx_to_send[`REDUCE_ID]].aru_dual2ub.reduce_m_en;
                    u_aru_reduce_cfg_if.reduce_n  = instr_slt[cfg_idx_to_send[`REDUCE_ID]].aru_dual2ub.reduce_n_en;
                    u_aru_reduce_cfg_if.reduce_op = instr_slt[cfg_idx_to_send[`REDUCE_ID]].aru_dual2ub.reduce_mode;
                    u_aru_reduce_cfg_if.slice_m   = instr_slt[cfg_idx_to_send[`REDUCE_ID]].aru_dual2ub.slice_m;
                    u_aru_reduce_cfg_if.slice_n   = instr_slt[cfg_idx_to_send[`REDUCE_ID]].aru_dual2ub.slice_n;
                end
                default: begin
                    u_aru_reduce_cfg_if.reduce_m  = 1'b0;
                    u_aru_reduce_cfg_if.reduce_n  = 1'b0;
                    u_aru_reduce_cfg_if.reduce_op = 2'd0;
                    u_aru_reduce_cfg_if.slice_m   = 'd0;
                    u_aru_reduce_cfg_if.slice_n   = 'd0;
                end
            endcase
        end else begin
            u_aru_reduce_cfg_if.vld       = 1'b0;
            u_aru_reduce_cfg_if.reduce_m  = 1'b0;
            u_aru_reduce_cfg_if.reduce_n  = 1'b0;
            u_aru_reduce_cfg_if.reduce_op = 2'd0;
            u_aru_reduce_cfg_if.slice_m   = 'd0;
            u_aru_reduce_cfg_if.slice_n   = 'd0;
        end

        // UB写通路配置
        if (cfg_en[`UB_WRGEN_ID]) begin
            u_aru_ub_wrgen_cfg_if.vld = 1'b1;
            case (instr_slt[cfg_idx_to_send[`UB_WRGEN_ID]].bin[7:0])
                8'd48: begin  // aru_psb2ub
                    u_aru_ub_wrgen_cfg_if.ub_addr = instr_slt[cfg_idx_to_send[`UB_WRGEN_ID]].aru_psb2ub.ub_addr;
                    u_aru_ub_wrgen_cfg_if.slice_m = instr_slt[cfg_idx_to_send[`UB_WRGEN_ID]].aru_psb2ub.slice_m;
                    u_aru_ub_wrgen_cfg_if.slice_n = instr_slt[cfg_idx_to_send[`UB_WRGEN_ID]].aru_psb2ub.slice_n;
                    u_aru_ub_wrgen_cfg_if.reduce_m = instr_slt[cfg_idx_to_send[`UB_WRGEN_ID]].aru_psb2ub.reduce_m_en;
                    u_aru_ub_wrgen_cfg_if.instr_idx = instr_slt[cfg_idx_to_send[`UB_WRGEN_ID]].aru_psb2ub.instr_idx;
                    u_aru_ub_wrgen_cfg_if.atomic_mode = instr_slt[cfg_idx_to_send[`UB_WRGEN_ID]].aru_psb2ub.ub_atomic_mode;
                end
                8'd50: begin  // aru_ub2ub
                    u_aru_ub_wrgen_cfg_if.ub_addr = instr_slt[cfg_idx_to_send[`UB_WRGEN_ID]].aru_ub2ub.ub_addr;
                    u_aru_ub_wrgen_cfg_if.slice_m = instr_slt[cfg_idx_to_send[`UB_WRGEN_ID]].aru_ub2ub.slice_m;
                    u_aru_ub_wrgen_cfg_if.slice_n = instr_slt[cfg_idx_to_send[`UB_WRGEN_ID]].aru_ub2ub.slice_n;
                    u_aru_ub_wrgen_cfg_if.reduce_m = instr_slt[cfg_idx_to_send[`UB_WRGEN_ID]].aru_ub2ub.reduce_m_en;
                    u_aru_ub_wrgen_cfg_if.instr_idx = instr_slt[cfg_idx_to_send[`UB_WRGEN_ID]].aru_ub2ub.instr_idx;
                    u_aru_ub_wrgen_cfg_if.atomic_mode = instr_slt[cfg_idx_to_send[`UB_WRGEN_ID]].aru_ub2ub.ub_atomic_mode;
                end
                8'd51: begin  // aru_dual2ub
                    u_aru_ub_wrgen_cfg_if.ub_addr = instr_slt[cfg_idx_to_send[`UB_WRGEN_ID]].aru_dual2ub.ub_addr;
                    u_aru_ub_wrgen_cfg_if.slice_m = instr_slt[cfg_idx_to_send[`UB_WRGEN_ID]].aru_dual2ub.slice_m;
                    u_aru_ub_wrgen_cfg_if.slice_n = instr_slt[cfg_idx_to_send[`UB_WRGEN_ID]].aru_dual2ub.slice_n;
                    u_aru_ub_wrgen_cfg_if.reduce_m = instr_slt[cfg_idx_to_send[`UB_WRGEN_ID]].aru_dual2ub.reduce_m_en;
                    u_aru_ub_wrgen_cfg_if.instr_idx = instr_slt[cfg_idx_to_send[`UB_WRGEN_ID]].aru_dual2ub.instr_idx;
                    u_aru_ub_wrgen_cfg_if.atomic_mode = instr_slt[cfg_idx_to_send[`UB_WRGEN_ID]].aru_dual2ub.ub_atomic_mode;
                end
                default: begin
                    u_aru_ub_wrgen_cfg_if.ub_addr     = 'd0;
                    u_aru_ub_wrgen_cfg_if.slice_m     = 'd0;
                    u_aru_ub_wrgen_cfg_if.slice_n     = 'd0;
                    u_aru_ub_wrgen_cfg_if.reduce_m    = 1'b0;
                    u_aru_ub_wrgen_cfg_if.instr_idx   = 'd0;
                    u_aru_ub_wrgen_cfg_if.atomic_mode = 'd0;
                end
            endcase
        end else begin
            u_aru_ub_wrgen_cfg_if.vld       = 1'b0;
            u_aru_ub_wrgen_cfg_if.ub_addr   = 'd0;
            u_aru_ub_wrgen_cfg_if.slice_m   = 'd0;
            u_aru_ub_wrgen_cfg_if.slice_n   = 'd0;
            u_aru_ub_wrgen_cfg_if.reduce_m  = 1'b0;
            u_aru_ub_wrgen_cfg_if.instr_idx = 'd0;
        end

        // GM写通路配置 
        if (cfg_en[`GM_WRGEN_ID]) begin
            u_aru_gm_wrgen_cfg_if.vld = 1'b1;
            case (instr_slt[cfg_idx_to_send[`GM_WRGEN_ID]].bin[7:0])
                8'd49: begin  // aru_psb2gm
                    u_aru_gm_wrgen_cfg_if.gm_addr   = instr_slt[cfg_idx_to_send[`GM_WRGEN_ID]].aru_psb2gm.gm_addr;
                    u_aru_gm_wrgen_cfg_if.slice_m   = instr_slt[cfg_idx_to_send[`GM_WRGEN_ID]].aru_psb2gm.slice_m;
                    u_aru_gm_wrgen_cfg_if.slice_n   = instr_slt[cfg_idx_to_send[`GM_WRGEN_ID]].aru_psb2gm.slice_n;
                    u_aru_gm_wrgen_cfg_if.instr_idx = instr_slt[cfg_idx_to_send[`GM_WRGEN_ID]].aru_psb2gm.instr_idx;
                end
                8'd52: begin  // aru_ub2gm
                    u_aru_gm_wrgen_cfg_if.gm_addr   = instr_slt[cfg_idx_to_send[`GM_WRGEN_ID]].aru_ub2gm.gm_addr;
                    u_aru_gm_wrgen_cfg_if.slice_m   = instr_slt[cfg_idx_to_send[`GM_WRGEN_ID]].aru_ub2gm.tile_m;
                    u_aru_gm_wrgen_cfg_if.slice_n   = instr_slt[cfg_idx_to_send[`GM_WRGEN_ID]].aru_ub2gm.tile_n;
                    u_aru_gm_wrgen_cfg_if.instr_idx = instr_slt[cfg_idx_to_send[`GM_WRGEN_ID]].aru_ub2gm.instr_idx;
                end
                default: begin
                    u_aru_gm_wrgen_cfg_if.gm_addr   = 'd0;
                    u_aru_gm_wrgen_cfg_if.slice_m   = 'd0;
                    u_aru_gm_wrgen_cfg_if.slice_n   = 'd0;
                    u_aru_gm_wrgen_cfg_if.instr_idx = 'd0;
                end
            endcase
        end else begin
            u_aru_gm_wrgen_cfg_if.vld       = 1'b0;
            u_aru_gm_wrgen_cfg_if.gm_addr   = 'd0;
            u_aru_gm_wrgen_cfg_if.slice_m   = 'd0;
            u_aru_gm_wrgen_cfg_if.slice_n   = 'd0;
            u_aru_gm_wrgen_cfg_if.instr_idx = 'd0;
        end

        // ARB写通路配置
        if (cfg_en[`ARB_WRGEN_ID]) begin
            u_aru_arb_wrgen_cfg_if.vld = 1'b1;
            case (instr_slt[cfg_idx_to_send[`ARB_WRGEN_ID]].bin[7:0])
                8'd48: begin  // aru_psb2ub
                    if (instr_slt[cfg_idx_to_send[`ARB_WRGEN_ID]].aru_psb2ub.arb_wr_en) begin
                        u_aru_arb_wrgen_cfg_if.arb_addr = instr_slt[cfg_idx_to_send[`ARB_WRGEN_ID]].aru_psb2ub.arb_addr;
                        u_aru_arb_wrgen_cfg_if.slice_m = instr_slt[cfg_idx_to_send[`ARB_WRGEN_ID]].aru_psb2ub.slice_m;
                        u_aru_arb_wrgen_cfg_if.slice_n = instr_slt[cfg_idx_to_send[`ARB_WRGEN_ID]].aru_psb2ub.slice_n;
                        u_aru_arb_wrgen_cfg_if.reduce_m = instr_slt[cfg_idx_to_send[`ARB_WRGEN_ID]].aru_psb2ub.reduce_m_en;
                        u_aru_arb_wrgen_cfg_if.reduce_n = instr_slt[cfg_idx_to_send[`ARB_WRGEN_ID]].aru_psb2ub.reduce_n_en;
                        u_aru_arb_wrgen_cfg_if.instr_idx = instr_slt[cfg_idx_to_send[`ARB_WRGEN_ID]].aru_psb2ub.instr_idx;
                    end
                end
                8'd50: begin  // aru_ub2ub
                    if (instr_slt[cfg_idx_to_send[`ARB_WRGEN_ID]].aru_ub2ub.arb_wr_en) begin
                        u_aru_arb_wrgen_cfg_if.arb_addr = instr_slt[cfg_idx_to_send[`ARB_WRGEN_ID]].aru_ub2ub.arb_addr;
                        u_aru_arb_wrgen_cfg_if.slice_m = instr_slt[cfg_idx_to_send[`ARB_WRGEN_ID]].aru_ub2ub.slice_m;
                        u_aru_arb_wrgen_cfg_if.slice_n = instr_slt[cfg_idx_to_send[`ARB_WRGEN_ID]].aru_ub2ub.slice_n;
                        u_aru_arb_wrgen_cfg_if.reduce_m = instr_slt[cfg_idx_to_send[`ARB_WRGEN_ID]].aru_ub2ub.reduce_m_en;
                        u_aru_arb_wrgen_cfg_if.reduce_n = instr_slt[cfg_idx_to_send[`ARB_WRGEN_ID]].aru_ub2ub.reduce_n_en;
                        u_aru_arb_wrgen_cfg_if.instr_idx = instr_slt[cfg_idx_to_send[`ARB_WRGEN_ID]].aru_ub2ub.instr_idx;
                    end
                end
                8'd51: begin  // aru_dual2ub
                    if (instr_slt[cfg_idx_to_send[`ARB_WRGEN_ID]].aru_dual2ub.arb_wr_en) begin
                        u_aru_arb_wrgen_cfg_if.arb_addr = instr_slt[cfg_idx_to_send[`ARB_WRGEN_ID]].aru_dual2ub.arb_addr;
                        u_aru_arb_wrgen_cfg_if.slice_m = instr_slt[cfg_idx_to_send[`ARB_WRGEN_ID]].aru_dual2ub.slice_m;
                        u_aru_arb_wrgen_cfg_if.slice_n = instr_slt[cfg_idx_to_send[`ARB_WRGEN_ID]].aru_dual2ub.slice_n;
                        u_aru_arb_wrgen_cfg_if.reduce_m = 1'b0;
                        u_aru_arb_wrgen_cfg_if.reduce_n = 1'b0;
                        u_aru_arb_wrgen_cfg_if.instr_idx = instr_slt[cfg_idx_to_send[`ARB_WRGEN_ID]].aru_dual2ub.instr_idx;
                    end
                end
                8'd53: begin  // aru_arb2arb
                    u_aru_arb_wrgen_cfg_if.arb_addr  = instr_slt[cfg_idx_to_send[`ARB_WRGEN_ID]].aru_arb2arb.arb_addr;
                    u_aru_arb_wrgen_cfg_if.slice_m   = instr_slt[cfg_idx_to_send[`ARB_WRGEN_ID]].aru_arb2arb.slice_m;
                    u_aru_arb_wrgen_cfg_if.slice_n   = 'd0;  // arb2arb只有M维度
                    u_aru_arb_wrgen_cfg_if.reduce_m  = 1'b0;
                    u_aru_arb_wrgen_cfg_if.reduce_n  = 1'b0;
                    u_aru_arb_wrgen_cfg_if.instr_idx = instr_slt[cfg_idx_to_send[`ARB_WRGEN_ID]].aru_arb2arb.instr_idx;
                end
                default: begin
                    u_aru_arb_wrgen_cfg_if.arb_addr  = 'd0;
                    u_aru_arb_wrgen_cfg_if.slice_m   = 'd0;
                    u_aru_arb_wrgen_cfg_if.slice_n   = 'd0;
                    u_aru_arb_wrgen_cfg_if.reduce_m  = 1'b0;
                    u_aru_arb_wrgen_cfg_if.reduce_n  = 1'b0;
                    u_aru_arb_wrgen_cfg_if.instr_idx = 'd0;
                end
            endcase
        end else begin
            u_aru_arb_wrgen_cfg_if.vld       = 1'b0;
            u_aru_arb_wrgen_cfg_if.arb_addr  = 'd0;
            u_aru_arb_wrgen_cfg_if.slice_m   = 'd0;
            u_aru_arb_wrgen_cfg_if.slice_n   = 'd0;
            u_aru_arb_wrgen_cfg_if.reduce_m  = 1'b0;
            u_aru_arb_wrgen_cfg_if.reduce_n  = 1'b0;
            u_aru_arb_wrgen_cfg_if.instr_idx = 'd0;
        end
    end




endmodule







